From: Frank Li Date: Tue, 28 May 2024 16:37:34 +0000 (-0400) Subject: dt-bindings: fsl-qdma: Convert to yaml format X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=671bc17fc4d14fed69ee86e1f7c2c972010c49ac;p=users%2Fjedix%2Flinux-maple.git dt-bindings: fsl-qdma: Convert to yaml format Convert binding doc from txt to yaml. Re-order interrupt-names to align example. Add #dma-cell in example. Change 'reg' in example to 32bit address. Signed-off-by: Frank Li Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240528163734.2471268-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul --- diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt deleted file mode 100644 index da371c4d406ce..0000000000000 --- a/Documentation/devicetree/bindings/dma/fsl-qdma.txt +++ /dev/null @@ -1,58 +0,0 @@ -NXP Layerscape SoC qDMA Controller -================================== - -This device follows the generic DMA bindings defined in dma/dma.txt. - -Required properties: - -- compatible: Must be one of - "fsl,ls1021a-qdma": for LS1021A Board - "fsl,ls1028a-qdma": for LS1028A Board - "fsl,ls1043a-qdma": for ls1043A Board - "fsl,ls1046a-qdma": for ls1046A Board -- reg: Should contain the register's base address and length. -- interrupts: Should contain a reference to the interrupt used by this - device. -- interrupt-names: Should contain interrupt names: - "qdma-queue0": the block0 interrupt - "qdma-queue1": the block1 interrupt - "qdma-queue2": the block2 interrupt - "qdma-queue3": the block3 interrupt - "qdma-error": the error interrupt -- fsl,dma-queues: Should contain number of queues supported. -- dma-channels: Number of DMA channels supported -- block-number: the virtual block number -- block-offset: the offset of different virtual block -- status-sizes: status queue size of per virtual block -- queue-sizes: command queue size of per virtual block, the size number - based on queues - -Optional properties: - -- dma-channels: Number of DMA channels supported by the controller. -- big-endian: If present registers and hardware scatter/gather descriptors - of the qDMA are implemented in big endian mode, otherwise in little - mode. - -Examples: - - qdma: dma-controller@8390000 { - compatible = "fsl,ls1021a-qdma"; - reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */ - <0x0 0x8389000 0x0 0x1000>, /* Status regs */ - <0x0 0x838a000 0x0 0x2000>; /* Block regs */ - interrupts = , - , - ; - interrupt-names = "qdma-error", - "qdma-queue0", "qdma-queue1"; - dma-channels = <8>; - block-number = <2>; - block-offset = <0x1000>; - fsl,dma-queues = <2>; - status-sizes = <64>; - queue-sizes = <64 64>; - big-endian; - }; - -DMA clients must use the format described in dma/dma.txt file. diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.yaml b/Documentation/devicetree/bindings/dma/fsl-qdma.yaml new file mode 100644 index 0000000000000..1b689a2529c87 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Layerscape SoC qDMA Controller + +maintainers: + - Frank Li + +properties: + compatible: + enum: + - fsl,ls1021a-qdma + - fsl,ls1028a-qdma + - fsl,ls1043a-qdma + - fsl,ls1046a-qdma + + reg: + items: + - description: Controller regs + - description: Status regs + - description: Block regs + + interrupts: + minItems: 2 + maxItems: 5 + + interrupt-names: + minItems: 2 + items: + - const: qdma-error + - const: qdma-queue0 + - const: qdma-queue1 + - const: qdma-queue2 + - const: qdma-queue3 + + dma-channels: + minimum: 1 + maximum: 64 + + fsl,dma-queues: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Should contain number of queues supported. + minimum: 1 + maximum: 4 + + block-number: + $ref: /schemas/types.yaml#/definitions/uint32 + description: the virtual block number + + block-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: the offset of different virtual block + + status-sizes: + $ref: /schemas/types.yaml#/definitions/uint32 + description: status queue size of per virtual block + + queue-sizes: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + command queue size of per virtual block, the size number + based on queues + + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: + If present registers and hardware scatter/gather descriptors + of the qDMA are implemented in big endian mode, otherwise in little + mode. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - fsl,dma-queues + - block-number + - block-offset + - status-sizes + - queue-sizes + +allOf: + - $ref: dma-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - fsl,ls1021a-qdma + then: + properties: + interrupts: + maxItems: 3 + interrupt-names: + maxItems: 3 + +unevaluatedProperties: false + +examples: + - | + #include + + dma-controller@8390000 { + compatible = "fsl,ls1021a-qdma"; + reg = <0x8388000 0x1000>, /* Controller regs */ + <0x8389000 0x1000>, /* Status regs */ + <0x838a000 0x2000>; /* Block regs */ + interrupts = , + , + ; + interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1"; + #dma-cells = <1>; + dma-channels = <8>; + block-number = <2>; + block-offset = <0x1000>; + status-sizes = <64>; + queue-sizes = <64 64>; + big-endian; + fsl,dma-queues = <2>; + }; +