From: Yinghai Lu Date: Thu, 28 May 2015 00:23:51 +0000 (-0700) Subject: PCI: Set under_pref for mem64 resource of pcie device X-Git-Tag: v4.1.12-92~283^2^2~9 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=6293dbd686528e1b9275b80234b199b9e579e547;p=users%2Fjedix%2Flinux-maple.git PCI: Set under_pref for mem64 resource of pcie device We still get "no compatible bridge window" warning on sparc T5-8 after we add support for 64bit resource parsing for root bus. PCI: scan_bus[/pci@300/pci@1/pci@0/pci@6] bus no 8 PCI: Claiming 0000:00:01.0: Resource 15: 0000800100000000..00008004afffffff [220c] PCI: Claiming 0000:01:00.0: Resource 15: 0000800100000000..00008004afffffff [220c] PCI: Claiming 0000:02:04.0: Resource 15: 0000800100000000..000080012fffffff [220c] PCI: Claiming 0000:03:00.0: Resource 15: 0000800100000000..000080012fffffff [220c] PCI: Claiming 0000:04:06.0: Resource 14: 0000800100000000..000080010fffffff [220c] PCI: Claiming 0000:05:00.0: Resource 0: 0000800100000000..0000800100001fff [204] pci 0000:05:00.0: can't claim BAR 0 [mem 0x800100000000-0x800100001fff]: no compatible bridge window All the bridges 64-bit resource have pref bit, but the device resource does not have pref set, then we can not find parent for the device resource, as we can not put non-pref mem under pref mem. According to pcie spec errta https://www.pcisig.com/specifications/pciexpress/base2/PCIe_Base_r2.1_Errata_08Jun10.pdf page 13, in some case it is ok to mark some as pref. Only set pref for 64bit mmio when the entire path from the host to the adapter is over PCI Express. Fixes: commit d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows") Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com Reported-by: David Ahern Tested-by: David Ahern Signed-off-by: Yinghai Lu Cc: #3.19 (cherry picked from commit ab88cbba3f034f6b2da122280a8000b02fc841dd) --- diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 6fbd3f2b5992..8bc5f0637362 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -139,6 +139,8 @@ static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, type_mask |= IORESOURCE_TYPE_BITS; + pci_set_pref_under_pref(res); + pci_bus_for_each_resource(bus, r, i) { if (!r) continue; @@ -170,9 +172,14 @@ static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, /* Ok, try it out.. */ ret = allocate_resource(r, res, size, min, max, align, alignf, alignf_data); - if (ret == 0) + if (ret == 0) { + pci_clear_pref_under_pref(res); return 0; + } } + + pci_clear_pref_under_pref(res); + return -ENOMEM; } diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 9bd762c237ab..53f6c470c97c 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -216,6 +216,17 @@ void __pci_bus_assign_resources(const struct pci_bus *bus, struct list_head *fail_head); bool pci_bus_clip_resource(struct pci_dev *dev, int idx); +static inline void pci_set_pref_under_pref(struct resource *res) +{ + if (res->flags & IORESOURCE_UNDER_PREF) + res->flags |= IORESOURCE_PREFETCH; +} +static inline void pci_clear_pref_under_pref(struct resource *res) +{ + if (res->flags & IORESOURCE_UNDER_PREF) + res->flags &= ~IORESOURCE_PREFETCH; +} + /** * pci_ari_enabled - query ARI forwarding status * @bus: the PCI bus diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index c91185721345..4b76731bf836 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1508,6 +1508,53 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_enable_acs(dev); } +static bool pci_up_path_over_pcie(struct pci_bus *bus) +{ + if (!bus) + return true; + + if (bus->self && !pci_is_pcie(bus->self)) + return false; + + return pci_up_path_over_pcie(bus->parent); +} + +/* + * According to + * https://www.pcisig.com/specifications/pciexpress/base2/PCIe_Base_r2.1_Errata_08Jun10.pdf + * page 13, system firmware could put some 64bit non-pref under 64bit pref, + * on some cases. + * Let's set pref bit for 64bit mmio when entire path from the host to + * the adapter is over PCI Express. + */ +static void set_pcie_64bit_under_pref(struct pci_dev *dev) +{ + int i; + + if (!pci_is_pcie(dev)) + return; + + if (!pci_up_path_over_pcie(dev->bus)) + return; + + for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) { + struct resource *res = &dev->resource[i]; + enum pci_bar_type type; + int reg; + + if (!(res->flags & IORESOURCE_MEM_64)) + continue; + + if (res->flags & IORESOURCE_PREFETCH) + continue; + + reg = pci_resource_bar(dev, i, &type); + dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x %pR + under_pref\n", + reg, res); + res->flags |= IORESOURCE_UNDER_PREF; + } +} + void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) { int ret; @@ -1538,6 +1585,9 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) /* Initialize various capabilities */ pci_init_capabilities(dev); + /* After pcie_cap is assigned and sriov bar is probed */ + set_pcie_64bit_under_pref(dev); + /* * Add the device to our list of discovered devices * and the bus list for fixup functions, etc. diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 508cc56130e3..b2c780485a76 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1037,10 +1037,13 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, struct resource *r = &dev->resource[i]; resource_size_t r_size; + pci_set_pref_under_pref(r); if (r->parent || ((r->flags & mask) != type && (r->flags & mask) != type2 && - (r->flags & mask) != type3)) + (r->flags & mask) != type3)) { + pci_clear_pref_under_pref(r); continue; + } r_size = resource_size(r); #ifdef CONFIG_PCI_IOV /* put SRIOV requested res to the optional list */ @@ -1050,6 +1053,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, r->end = r->start - 1; add_to_list(realloc_head, dev, r, r_size, 0/* don't care */); children_add_size += r_size; + pci_clear_pref_under_pref(r); continue; } #endif @@ -1082,6 +1086,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, children_add_align = get_res_add_align(realloc_head, r); add_align = max(add_align, children_add_align); } + pci_clear_pref_under_pref(r); } } diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 232f9254c11a..a385b00320c6 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -116,11 +116,14 @@ int pci_claim_resource(struct pci_dev *dev, int resource) return -EINVAL; } + pci_set_pref_under_pref(res); + root = pci_find_parent_resource(dev, res); if (!root) { dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n", resource, res); res->flags |= IORESOURCE_UNSET; + pci_clear_pref_under_pref(res); return -EINVAL; } @@ -129,9 +132,12 @@ int pci_claim_resource(struct pci_dev *dev, int resource) dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n", resource, res, conflict->name, conflict); res->flags |= IORESOURCE_UNSET; + pci_clear_pref_under_pref(res); return -EBUSY; } + pci_clear_pref_under_pref(res); + return 0; } EXPORT_SYMBOL(pci_claim_resource); @@ -250,9 +256,11 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev, static int _pci_assign_resource(struct pci_dev *dev, int resno, resource_size_t size, resource_size_t min_align) { + struct resource *res = dev->resource + resno; struct pci_bus *bus; int ret; + pci_set_pref_under_pref(res); bus = dev->bus; while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) { if (!bus->parent || !bus->self->transparent) @@ -260,6 +268,8 @@ static int _pci_assign_resource(struct pci_dev *dev, int resno, bus = bus->parent; } + pci_clear_pref_under_pref(res); + return ret; } diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 388e3ae94f7a..ec7451e175a7 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -49,6 +49,8 @@ struct resource { #define IORESOURCE_WINDOW 0x00200000 /* forwarded by bridge */ #define IORESOURCE_MUXED 0x00400000 /* Resource is software muxed */ +#define IORESOURCE_UNDER_PREF 0x00800000 /* non-pref could under pref */ + #define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */ #define IORESOURCE_DISABLED 0x10000000 #define IORESOURCE_UNSET 0x20000000 /* No address assigned yet */