From: Claudiu Beznea Date: Tue, 10 Dec 2024 17:09:31 +0000 (+0200) Subject: dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=626b77735a3712b02dabb25be3a0abdde6696bf3;p=users%2Fjedix%2Flinux-maple.git dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator There are some differences b/w 5L35023 and 5P35023 Versa3 clock generator variants but the same driver could be used with minimal adjustments. The identified differences are PLL2 Fvco, the clock sel bit for SE2 clock and different default values for some registers. Acked-by: Krzysztof Kozlowski Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20241210170953.2936724-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Stephen Boyd --- diff --git a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml index 42b6f80613f3c..162d380351884 100644 --- a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml @@ -31,6 +31,7 @@ description: | properties: compatible: enum: + - renesas,5l35023 - renesas,5p35023 reg: