From: Michael Chan Date: Fri, 3 Nov 2017 07:32:39 +0000 (-0400) Subject: bnxt_en: Fix IRQ coalescing regression. X-Git-Tag: v4.1.12-124.31.3~936 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=5f4a41d2670a685d3a6fa276944fd1ae1acbfac9;p=users%2Fjedix%2Flinux-maple.git bnxt_en: Fix IRQ coalescing regression. Orabug: 27648355, 27648339 Recent IRQ coalescing clean up has removed a guard-rail for the max DMA buffer coalescing value. This is a 6-bit value and must not be 0. We already have a check for 0 but 64 is equivalent to 0 and will cause non-stop interrupts. Fix it by adding the proper check. Fixes: f8503969d27b ("bnxt_en: Refactor and simplify coalescing code.") Reported-by: Andy Gospodarek Signed-off-by: Michael Chan Signed-off-by: David S. Miller (cherry picked from commit b153cbc507946f52d5aa687fd64f45d82cb36a3b) Signed-off-by: Brian Maly Reviewed-by: Jack Vogel --- diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index b1e4b316877e..2a5d48083799 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -4522,9 +4522,13 @@ static void bnxt_hwrm_set_coal_params(struct bnxt_coal *hw_coal, val = clamp_t(u16, hw_coal->coal_bufs, 1, max); req->num_cmpl_aggr_int = cpu_to_le16(val); + + /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */ + val = min_t(u16, val, 63); req->num_cmpl_dma_aggr = cpu_to_le16(val); - val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, max); + /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */ + val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, 63); req->num_cmpl_dma_aggr_during_int = cpu_to_le16(val); tmr = BNXT_USEC_TO_COAL_TIMER(hw_coal->coal_ticks);