From: Eugeniy Paltsev Date: Wed, 11 Mar 2020 13:41:15 +0000 (+0300) Subject: CLK: HSDK: CGU: add support for 148.5MHz clock X-Git-Tag: v5.8-rc1~69^2~4^3 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=56fbeefe366e5920802f60f26b6b59b365c0569b;p=linux-platform-drivers-x86.git CLK: HSDK: CGU: add support for 148.5MHz clock Add support for 148.5MHz clock for HDMI PLL Signed-off-by: Eugeniy Paltsev Link: https://lkml.kernel.org/r/20200311134115.13257-4-Eugeniy.Paltsev@synopsys.com Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/clk-hsdk-pll.c b/drivers/clk/clk-hsdk-pll.c index 0ea7af57a5b1..b4f8852201cb 100644 --- a/drivers/clk/clk-hsdk-pll.c +++ b/drivers/clk/clk-hsdk-pll.c @@ -81,6 +81,7 @@ static const struct hsdk_pll_cfg asdt_pll_cfg[] = { static const struct hsdk_pll_cfg hdmi_pll_cfg[] = { { 27000000, 0, 0, 0, 0, 1 }, + { 148500000, 0, 21, 3, 0, 0 }, { 297000000, 0, 21, 2, 0, 0 }, { 540000000, 0, 19, 1, 0, 0 }, { 594000000, 0, 21, 1, 0, 0 },