From: David Woodhouse Date: Thu, 25 Jan 2018 16:14:15 +0000 (+0000) Subject: x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) support X-Git-Tag: v4.1.12-124.31.3~1151 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=565b0bd86e905ba3333ddb13a8e8ae63010bbad6;p=users%2Fjedix%2Flinux-maple.git x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) support Expose indirect_branch_prediction_barrier() for use in subsequent patches. [ tglx: Add IBPB status to spectre_v2 sysfs file ] Co-developed-by: KarimAllah Ahmed Signed-off-by: KarimAllah Ahmed Signed-off-by: David Woodhouse Cc: gnomes@lxorguk.ukuu.org.uk Cc: ak@linux.intel.com Cc: ashok.raj@intel.com Cc: dave.hansen@intel.com Cc: arjan@linux.intel.com Cc: torvalds@linux-foundation.org Cc: peterz@infradead.org Cc: bp@alien8.de Cc: pbonzini@redhat.com Cc: tim.c.chen@linux.intel.com Cc: gregkh@linux-foundation.org Link: https://lkml.kernel.org/r/1516896855-7642-8-git-send-email-dwmw@amazon.co.uk (cherry picked from commit 20ffa1caecca4db8f79fe665acdeaa5af815a24d) Orabug: 27477743 CVE: CVE-2017-5715 Conflicts: arch/x86/include/asm/cpufeatures.h arch/x86/kernel/cpu/bugs.c [The original version of this patch doesn't set X86_FEATURE_IBPB, so do it ourselves. Given X86_FEATURE_SPEC_CTRL (i.e. CPUID.07.[EDX.26])[*], always set X86_FEATURE_IBPB in scattered.c. This omission did not impact the actual IBPB functionality as the code uses 'ibpb_inuse': the only thing missing was the 'ibpb' string in /proc/cpuinfo. Since we already have code to enable IBPB (e.g. switch_mm_irqs_off), there is no point in backporting indirect_branch_prediction_barrier from this patch.] [*] 336996-Speculative-Execution-Side-Channel-Mitigations.pdf Signed-off-by: Konrad Rzeszutek Wilk Reviewed-by: Pavel Tatashin Reviewed-by: Darren Kenny Reviewed-by: Daniel Jordan --- diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c index 421b151e8dea..cf5787768eee 100644 --- a/arch/x86/kernel/cpu/bugs_64.c +++ b/arch/x86/kernel/cpu/bugs_64.c @@ -375,6 +375,10 @@ out: } /* Future CPUs with IBRS_ATT might be able to avoid this. */ setup_force_cpu_cap(X86_FEATURE_VMEXIT_RSB_FULL); + + /* Initialize Indirect Branch Prediction Barrier if supported */ + if (boot_cpu_has(X86_FEATURE_IBPB) && ibpb_inuse) + pr_info("Enabling Indirect Branch Prediction Barrier\n"); } #undef pr_fmt diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 8cd8a7ae42de..06e9143e3489 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -87,6 +87,9 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_IBRS_ATT); } + if (cpu_has(c, X86_FEATURE_IBRS)) + set_cpu_cap(c, X86_FEATURE_IBPB); + if (!c->cpu_index) { bool ignore = false;