From: Dmitry Torokhov Date: Thu, 27 Oct 2022 07:46:51 +0000 (-0700) Subject: arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=564a8e6ef47be0788ad9ace06a442fe4e42467dd;p=users%2Fjedix%2Flinux-maple.git arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0 [ Upstream commit b8f298d4f69d82119ac0d22809a17c80b1f188d1 ] The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: f8b4eb64f200 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards") Signed-off-by: Dmitry Torokhov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221027074652.1044235-5-dmitry.torokhov@gmail.com Signed-off-by: Sasha Levin --- diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index cd432a2856a7..7772dfba94ec 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -34,7 +34,7 @@ pinctrl-0 = <&wcd_reset_n>; pinctrl-1 = <&wcd_reset_n_sleep>; - reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; qcom,rx-device = <&wcd_rx>; qcom,tx-device = <&wcd_tx>;