From: Richard Henderson Date: Mon, 23 Mar 2020 17:22:30 +0000 (+0000) Subject: target/arm: Move computation of index in handle_simd_dupe X-Git-Tag: v5.0.0-rc0~5^2 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=550a04893c2bd4442211b353680b9a6408d94dba;p=users%2Fdwmw2%2Fqemu.git target/arm: Move computation of index in handle_simd_dupe Coverity reports a BAD_SHIFT with ctz32(imm5), with imm5 == 0. This is an invalid encoding, but we diagnose that just below by rejecting size > 3. Avoid the warning by sinking the computation of index below the check. Reported-by: Coverity (CID 1421965) Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-id: 20200320160622.8040-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 032478614c..7580e46367 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7422,7 +7422,7 @@ static void handle_simd_dupe(DisasContext *s, int is_q, int rd, int rn, int imm5) { int size = ctz32(imm5); - int index = imm5 >> (size + 1); + int index; if (size > 3 || (size == 3 && !is_q)) { unallocated_encoding(s); @@ -7433,6 +7433,7 @@ static void handle_simd_dupe(DisasContext *s, int is_q, int rd, int rn, return; } + index = imm5 >> (size + 1); tcg_gen_gvec_dup_mem(size, vec_full_reg_offset(s, rd), vec_reg_offset(s, rn, index, size), is_q ? 16 : 8, vec_full_reg_size(s));