From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun, 12 Nov 2023 18:58:08 +0000 (-0800)
Subject: Merge tag 'loongarch-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai... 
X-Git-Tag: nvme-6.7-2023-12-01~35
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=4eeee6636af819454d7c43702e77ec7857a63000;p=nvme.git

Merge tag 'loongarch-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch updates from Huacai Chen:

 - support PREEMPT_DYNAMIC with static keys

 - relax memory ordering for atomic operations

 - support BPF CPU v4 instructions for LoongArch

 - some build and runtime warning fixes

* tag 'loongarch-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  selftests/bpf: Enable cpu v4 tests for LoongArch
  LoongArch: BPF: Support signed mod instructions
  LoongArch: BPF: Support signed div instructions
  LoongArch: BPF: Support 32-bit offset jmp instructions
  LoongArch: BPF: Support unconditional bswap instructions
  LoongArch: BPF: Support sign-extension mov instructions
  LoongArch: BPF: Support sign-extension load instructions
  LoongArch: Add more instruction opcodes and emit_* helpers
  LoongArch/smp: Call rcutree_report_cpu_starting() earlier
  LoongArch: Relax memory ordering for atomic operations
  LoongArch: Mark __percpu functions as always inline
  LoongArch: Disable module from accessing external data directly
  LoongArch: Support PREEMPT_DYNAMIC with static keys
---

4eeee6636af819454d7c43702e77ec7857a63000
diff --cc arch/loongarch/include/asm/inst.h
index 008a88ead60d,5350ae9ee380..d8f637f9e400
--- a/arch/loongarch/include/asm/inst.h
+++ b/arch/loongarch/include/asm/inst.h
@@@ -65,14 -65,8 +65,16 @@@ enum reg2_op 
  	revbd_op	= 0x0f,
  	revh2w_op	= 0x10,
  	revhd_op	= 0x11,
+ 	extwh_op	= 0x16,
+ 	extwb_op	= 0x17,
 +	iocsrrdb_op     = 0x19200,
 +	iocsrrdh_op     = 0x19201,
 +	iocsrrdw_op     = 0x19202,
 +	iocsrrdd_op     = 0x19203,
 +	iocsrwrb_op     = 0x19204,
 +	iocsrwrh_op     = 0x19205,
 +	iocsrwrw_op     = 0x19206,
 +	iocsrwrd_op     = 0x19207,
  };
  
  enum reg2i5_op {