From: Jan Dakinevich Date: Wed, 23 Aug 2023 21:36:25 +0000 (+0300) Subject: arm64: dts: meson: a1: add eMMC controller and its pins X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=4d860a98bcf39e946e3419f3d42120374590080f;p=linux.git arm64: dts: meson: a1: add eMMC controller and its pins The definition is inspired by a similar one for AXG SoC family. 'sdio_pins' and 'sdio_clk_gate_pins' pinctrls are supposed to be used as "default" and "clk-gate" in board-specific device trees. During initialization 'meson-gx' driver sets clock to safe low-frequency value (400kHz). However, both source clocks ("clkin0" and "clkin1") are high-frequency by default, and using of eMMC's internal divider is not enough to achieve so low values. To provide low-frequency source, reparent "sd_emmc_sel2" clock using 'assigned-clocks' property. Signed-off-by: Jan Dakinevich Signed-off-by: Dmitry Rokosov Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230823213630.12936-11-ddrokosov@sberdevices.ru Signed-off-by: Neil Armstrong --- diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index e2f7c719f9bb..d20712ffc2f8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -142,6 +142,32 @@ bias-pull-down; }; }; + + sdio_pins: sdio { + mux0 { + groups = "sdcard_d0_x", + "sdcard_d1_x", + "sdcard_d2_x", + "sdcard_d3_x", + "sdcard_cmd_x"; + function = "sdcard"; + bias-pull-up; + }; + + mux1 { + groups = "sdcard_clk_x"; + function = "sdcard"; + bias-disable; + }; + }; + + sdio_clk_gate_pins: sdio-clk-gate { + mux { + groups = "sdcard_clk_x"; + function = "sdcard"; + bias-pull-down; + }; + }; }; gpio_intc: interrupt-controller@440 { @@ -208,6 +234,23 @@ <&clkc_periphs CLKID_HIFIPLL_IN>; clock-names = "fixpll_in", "hifipll_in"; }; + + sd_emmc: sd@10000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x10000 0x0 0x800>; + interrupts = ; + clocks = <&clkc_periphs CLKID_SD_EMMC_A>, + <&clkc_periphs CLKID_SD_EMMC>, + <&clkc_pll CLKID_FCLK_DIV2>; + clock-names = "core", + "clkin0", + "clkin1"; + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>; + assigned-clock-parents = <&xtal>; + resets = <&reset RESET_SD_EMMC_A>; + power-domains = <&pwrc PWRC_SD_EMMC_ID>; + status = "disabled"; + }; }; usb: usb@fe004400 {