From: Daniel Jordan Date: Wed, 18 Jul 2018 16:23:09 +0000 (-0700) Subject: x86/bugs: always use x86_spec_ctrl_base or _priv when setting spec ctrl MSR X-Git-Tag: v4.1.12-124.31.3~414 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=41cfc0d26f211844f546c24da728217efc50dfe4;p=users%2Fjedix%2Flinux-maple.git x86/bugs: always use x86_spec_ctrl_base or _priv when setting spec ctrl MSR x86_spec_ctrl_base and x86_spec_ctrl_priv contain reserved bits from the first read of the spec ctrl MSR but in one case neither of these are used when updating the MSR in x86_spec_ctrl_set. This does not seem to cause problems now, but add it in for consistency. In this case, we need to use x86_spec_ctrl_base because IBRS isn't being enabled. Fixes: edcba197bb44 ("x86/bugs/IBRS: Use variable instead of defines for enabling IBRS") Signed-off-by: Daniel Jordan Reviewed-by: Mihai Carabas Reviewed-by: Alexandre Chartre (cherry picked from commit a5429dd0a22342bf3e03649af25e5ad3dd6e01e7) Orabug: 28271063 Signed-off-by: Anjali Kulkarni Reviewed-by: Zhenzhong Duan Signed-off-by: Brian Maly --- diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c index 7024d2908e77..fbad062e87c3 100644 --- a/arch/x86/kernel/cpu/bugs_64.c +++ b/arch/x86/kernel/cpu/bugs_64.c @@ -279,7 +279,8 @@ void x86_spec_ctrl_set(u64 val) if (val & SPEC_CTRL_IBRS) host = this_cpu_read(x86_spec_ctrl_priv_cpu); else - host = val & ~(SPEC_CTRL_SSBD); + host = (x86_spec_ctrl_base | val) & + ~SPEC_CTRL_SSBD; } else { if (ibrs_inuse && (val & SPEC_CTRL_IBRS)) host = this_cpu_read(x86_spec_ctrl_priv_cpu);