From: Tim Lunn <tim@feathertop.org>
Date: Sun, 3 Dec 2023 12:40:02 +0000 (+1100)
Subject: ARM: dts: rockchip: Add rv1109 SoC
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=36ad2e479f69d93a27bc0721308e90a4c1101e70;p=users%2Fjedix%2Flinux-maple.git

ARM: dts: rockchip: Add rv1109 SoC

The Rockchip rv1109 SoC is a dual core version of the rv1126. It is
otherwise identical and shares the same device tree config.

This patch introduces a dtsi file to drop the additional cpu nodes.
Taken from Rockchip BSP kernel.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Link: https://lore.kernel.org/r/20231203124004.2676174-7-tim@feathertop.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---

diff --git a/arch/arm/boot/dts/rockchip/rv1109.dtsi b/arch/arm/boot/dts/rockchip/rv1109.dtsi
new file mode 100644
index 000000000000..9cbaa08ab1b8
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1109.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1126.dtsi"
+
+/ {
+	compatible = "rockchip,rv1109";
+
+	cpus {
+		/delete-node/ cpu@f02;
+		/delete-node/ cpu@f03;
+	};
+
+	arm-pmu {
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+	};
+};