From: Hawking Zhang <Hawking.Zhang@amd.com>
Date: Mon, 12 Mar 2018 10:25:15 +0000 (+0800)
Subject: drm/amdgpu/soc15: initialize reg base for vega12
X-Git-Tag: v4.17-rc1~185^2~4^2~27
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=3084eb0011b38cceaafb9312ad90fe20d343daa7;p=users%2Fhch%2Fmisc.git

drm/amdgpu/soc15: initialize reg base for vega12

Initialize the IP offsets for vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index e308c3c6ca4f..51cf8a30f6c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -508,6 +508,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 	/* Set IP register base before any HW register access */
 	switch (adev->asic_type) {
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_RAVEN:
 		vega10_reg_base_init(adev);
 		break;