From: Mihai Carabas Date: Mon, 18 Mar 2019 13:56:16 +0000 (+0200) Subject: x86: cpu: microcode: Re-evaluate bugs in a CPU after microcode loading X-Git-Tag: v4.1.12-124.31.3~234 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=2a9b75ea713843c4ed7e4a87fb9d47f60bbcdbb3;p=users%2Fjedix%2Flinux-maple.git x86: cpu: microcode: Re-evaluate bugs in a CPU after microcode loading After doing a new microcode load, we have to re-evaluate bugs in the CPU in order to see if the microcode brought changes. We clear caps for X86_BUG_SPEC_STORE_BYPASS, X86_BUG_CPU_MELTDOWN and X86_BUG_L1TF as these can be modified by new microcode loading. Orabug: 29336760 Signed-off-by: Mihai Carabas Reviewed-by: Boris Ostrovsky Signed-off-by: Brian Maly --- diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index e8aabd27e976..c64a698b5e42 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -192,6 +192,7 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c, extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern void init_amd_cacheinfo(struct cpuinfo_x86 *c); +extern void cpu_set_bug_bits(struct cpuinfo_x86 *c); extern int detect_extended_topology(struct cpuinfo_x86 *c); extern void detect_ht(struct cpuinfo_x86 *c); diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 1f2b47ceede6..9fa8a129425c 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -861,7 +861,7 @@ static const struct x86_cpu_id cpu_no_l1tf[] = { {} }; -static void cpu_set_bug_bits(struct cpuinfo_x86 *c) +void cpu_set_bug_bits(struct cpuinfo_x86 *c) { u64 ia32_cap = 0; diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index 4e8280c7f96d..a6e07caf4cff 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -164,6 +164,23 @@ static int collect_cpu_info(int cpu) static void microcode_late_eval_cpuid(void *arg) { + /* + * First we clear the bugs that are not fully connected with + * CPU model and can be modified after a microcode loading + * and than re-evealuate CPU bugs. We are using CPU 0 as all + * of these are stored in boot_cpu_data. + */ + if(smp_processor_id() == 0) { + setup_clear_cpu_cap(X86_BUG_SPEC_STORE_BYPASS); + setup_clear_cpu_cap(X86_BUG_CPU_MELTDOWN); + setup_clear_cpu_cap(X86_BUG_L1TF); + cpu_set_bug_bits(&cpu_data(smp_processor_id())); + + /* If CPU is not susceptible to L1TF, clean-up the L1TF_PTEINV cap. */ + if (!boot_cpu_has(X86_BUG_L1TF)) + setup_clear_cpu_cap(X86_FEATURE_L1TF_PTEINV); + } + init_scattered_cpuid_features(&cpu_data(smp_processor_id()), GET_CPU_CAP_FULL); }