From: Nick Chan <towinchenmi@gmail.com>
Date: Thu, 20 Feb 2025 12:21:43 +0000 (+0800)
Subject: arm64: dts: apple: t7000: Add CPU caches
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=1ed7edcf5caa4332e33c4f43a1a36750ac61a652;p=users%2Fjedix%2Flinux-maple.git

arm64: dts: apple: t7000: Add CPU caches

Add information about CPU caches in Apple A8 SoC.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250220-caches-v1-2-2c7011097768@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
---

diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi
index 85a34dc7bc01..52edc8d776a9 100644
--- a/arch/arm64/boot/dts/apple/t7000.dtsi
+++ b/arch/arm64/boot/dts/apple/t7000.dtsi
@@ -37,6 +37,9 @@
 			operating-points-v2 = <&typhoon_opp>;
 			enable-method = "spin-table";
 			device_type = "cpu";
+			next-level-cache = <&l2_cache>;
+			i-cache-size = <0x10000>;
+			d-cache-size = <0x10000>;
 		};
 
 		cpu1: cpu@1 {
@@ -47,6 +50,16 @@
 			operating-points-v2 = <&typhoon_opp>;
 			enable-method = "spin-table";
 			device_type = "cpu";
+			next-level-cache = <&l2_cache>;
+			i-cache-size = <0x10000>;
+			d-cache-size = <0x10000>;
+		};
+
+		l2_cache: l2-cache {
+			compatible = "cache";
+			cache-level = <2>;
+			cache-unified;
+			cache-size = <0x100000>;
 		};
 	};