From: Konrad Rzeszutek Wilk Date: Thu, 26 Apr 2018 02:04:25 +0000 (-0400) Subject: x86/KVM/VMX: Expose SPEC_CTRL Bit(2) to the guest X-Git-Tag: v4.1.12-124.31.3~769 X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=1dc1d6e204b3aa16c90249f21935d0c3687303bd;p=users%2Fjedix%2Flinux-maple.git x86/KVM/VMX: Expose SPEC_CTRL Bit(2) to the guest Expose the CPUID.7.EDX[31] bit to the guest, and also guard against various combinations of SPEC_CTRL MSR values. The handling of the MSR (to take into account the host value of SPEC_CTRL Bit(2)) is taken care of in patch: KVM/SVM/VMX/x86/spectre_v2: Support the combination of guest and host IBRS OraBug: 28041771 CVE: CVE-2018-3639 Signed-off-by: Konrad Rzeszutek Wilk Signed-off-by: Thomas Gleixner Reviewed-by: Ingo Molnar (cherry picked from commit da39556f66f5cfe8f9c989206974f1cb16ca5d7c) Signed-off-by: Konrad Rzeszutek Wilk Reviewed-by: Mihai Carabas Conflicts: arch/x86/kvm/cpuid.c arch/x86/kvm/vmx.c Signed-off-by: Brian Maly --- diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 099bc7a57018c..1e3e2eb4b1e51 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -61,6 +61,7 @@ u64 kvm_supported_xcr0(void) /* These are scattered features in cpufeatures.h. */ #define KVM_CPUID_BIT_IBRS 26 #define KVM_CPUID_BIT_STIBP 27 +#define KVM_CPUID_BIT_RDS 31 /* CPUID[eax=0x80000008].ebx */ @@ -364,7 +365,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, const u32 kvm_supported_word10_x86_features = F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves; - const u32 kvm_cpuid_7_0_edx_x86_features = KF(IBRS) | KF(STIBP); + const u32 kvm_cpuid_7_0_edx_x86_features = KF(IBRS) | KF(STIBP) | + KF(RDS); /* cpuid 0x80000008.ebx */ const u32 kvm_cpuid_80000008_ebx_x86_features = @@ -444,9 +446,11 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, entry->edx &= kvm_cpuid_7_0_edx_x86_features; /* Aka !ibrs_supported and !ibpb_supported */ if ( !boot_cpu_has(X86_FEATURE_IBRS) ) - entry->edx &= !(1u << KVM_CPUID_BIT_IBRS); + entry->edx &= ~(1u << KVM_CPUID_BIT_IBRS); if ( !boot_cpu_has(X86_FEATURE_STIBP) ) - entry->edx &= !(1u << KVM_CPUID_BIT_STIBP); + entry->edx &= ~(1u << KVM_CPUID_BIT_STIBP); + if ( !boot_cpu_has(X86_FEATURE_RDS) ) + entry->edx &= ~(1u << KVM_CPUID_BIT_RDS); } else { entry->ebx = 0; entry->edx = 0;