From: Dan Williams <dan.j.williams@intel.com>
Date: Mon, 24 Jan 2022 00:29:42 +0000 (-0800)
Subject: cxl/core: Fix cxl_probe_component_regs() error message
X-Git-Tag: v5.17.2~595
X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=13b49a3e8479efda537ff920bb2e78a8fe8d044b;p=users%2Fdwmw2%2Flinux.git

cxl/core: Fix cxl_probe_component_regs() error message

[ Upstream commit d621bc2e7282f9955033a6359877fd4ac4be60e1 ]

Fix a '\n' vs '/n' typo.

Fixes: 08422378c4ad ("cxl/pci: Add HDM decoder capabilities")
Acked-by: Ben Widawsky <ben.widawsky@intel.com
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298418268.3018233.17790073375430834911.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c
index e37e23bf43553..cdc0b75d94f22 100644
--- a/drivers/cxl/core/regs.c
+++ b/drivers/cxl/core/regs.c
@@ -49,7 +49,7 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base,
 
 	if (FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, cap_array) != CM_CAP_HDR_CAP_ID) {
 		dev_err(dev,
-			"Couldn't locate the CXL.cache and CXL.mem capability array header./n");
+			"Couldn't locate the CXL.cache and CXL.mem capability array header.\n");
 		return;
 	}