From: Mark Bloch Date: Mon, 22 Sep 2025 06:06:31 +0000 (+0300) Subject: net/mlx5: IFC add balance ID and LAG per MP group bits X-Git-Url: https://www.infradead.org/git/?a=commitdiff_plain;h=137d1a6355131457723b51a34192320d93d15654;p=users%2Fhch%2Fmisc.git net/mlx5: IFC add balance ID and LAG per MP group bits Add interface definitions for load balance ID and LAG per multiplane group functionality. This patch introduces the hardware capability bits needed to support balance ID in multiplane LAG configurations. The new fields include: - load_balance_id: 4-bit field for balance identifier. - lag_per_mp_group: capability bit for LAG per multiplane group support. These interface additions are prerequisites for implementing balance ID support in the MLX5 driver. Signed-off-by: Mark Bloch Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/1758521191-814350-3-git-send-email-tariqt@nvidia.com Signed-off-by: Leon Romanovsky --- diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index c0f5fee7a4a5..07614cd95bed 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -2235,12 +2235,16 @@ struct mlx5_ifc_cmd_hca_cap_2_bits { u8 reserved_at_440[0x8]; u8 max_num_eqs_24b[0x18]; - u8 reserved_at_460[0x160]; + u8 reserved_at_460[0x144]; + u8 load_balance_id[0x4]; + u8 reserved_at_5a8[0x18]; u8 query_adjacent_functions_id[0x1]; u8 ingress_egress_esw_vport_connect[0x1]; u8 function_id_type_vhca_id[0x1]; - u8 reserved_at_5c3[0xd]; + u8 reserved_at_5c3[0x1]; + u8 lag_per_mp_group[0x1]; + u8 reserved_at_5c5[0xb]; u8 delegate_vhca_management_profiles[0x10]; u8 delegated_vhca_max[0x10];