]> www.infradead.org Git - users/mchehab/edac.git/commitdiff
edac: rename is_csrows and GET_POS hw_events_v14
authorMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 23 Apr 2012 19:59:33 +0000 (19:59 +0000)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Mon, 23 Apr 2012 19:59:33 +0000 (19:59 +0000)
Those names don't represent well the meaning for those fields.
So, rename them to be meaningful.

As "is_csrows" is used to indicate that a layer is part of the
virtual csrow, let's name it as is_virt_csrows.

As "GET_POS" is used to get the EDAC mci dimm_info pointer for
a given layer address, let's call it as "EDAC_DIMM_PTR".

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
27 files changed:
drivers/edac/amd64_edac.c
drivers/edac/amd76x_edac.c
drivers/edac/cell_edac.c
drivers/edac/cpc925_edac.c
drivers/edac/e752x_edac.c
drivers/edac/e7xxx_edac.c
drivers/edac/edac_mc.c
drivers/edac/i3000_edac.c
drivers/edac/i3200_edac.c
drivers/edac/i5000_edac.c
drivers/edac/i5100_edac.c
drivers/edac/i5400_edac.c
drivers/edac/i7300_edac.c
drivers/edac/i7core_edac.c
drivers/edac/i82443bxgx_edac.c
drivers/edac/i82860_edac.c
drivers/edac/i82875p_edac.c
drivers/edac/i82975x_edac.c
drivers/edac/mpc85xx_edac.c
drivers/edac/mv64x60_edac.c
drivers/edac/pasemi_edac.c
drivers/edac/ppc4xx_edac.c
drivers/edac/r82600_edac.c
drivers/edac/sb_edac.c
drivers/edac/tile_edac.c
drivers/edac/x38_edac.c
include/linux/edac.h

index 08af66c77b0dd3494cb2227c9a47a5a8214a9785..50467a03c4716b81137d0cb228915719d20005bc 100644 (file)
@@ -2568,10 +2568,10 @@ static int amd64_init_one_instance(struct pci_dev *F2)
        ret = -ENOMEM;
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = pvt->csels[0].b_cnt;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = pvt->channel_count;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, false, 0);
        if (!mci)
                goto err_siblings;
index 99d8d564c927ad147faf2da2a116484dd846beda..be6c2251cce5bf14f9559735e17bb73974329118 100644 (file)
@@ -247,10 +247,10 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = AMD76X_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = 1;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
 
        if (mci == NULL)
index ee61f0dc01bb766a59774dd907c0436894e8ddce..d28167b2e8968c5347f4541e2684ea2ea4c371bf 100644 (file)
@@ -200,10 +200,10 @@ static int __devinit cell_edac_probe(struct platform_device *pdev)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = 1;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = num_chans;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, false,
                            sizeof(struct cell_edac_priv));
        if (mci == NULL)
index 02030897411c05e3aebaea89968772a8b0ed692b..31b3c91884f2c63806856ab3720d8b4583301fe5 100644 (file)
@@ -978,10 +978,10 @@ static int __devinit cpc925_probe(struct platform_device *pdev)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = CPC925_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = nr_channels;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false,
                            sizeof(struct cpc925_mc_pdata));
        if (!mci) {
index 35f282ed2ade1ef52a4b88b3c17476edd595f02d..7e601c1f687529d551ab276359e1894c2e729f09 100644 (file)
@@ -1293,10 +1293,10 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = E752X_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = drc_chan + 1;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
                            false, sizeof(*pvt));
        if (mci == NULL)
index 93695e465583bc037e36a4ca5b27fed44083591e..2defa962280714dc36c9ac66a20d389a3cd0b362 100644 (file)
@@ -445,10 +445,10 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
         */
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = E7XXX_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = drc_chan + 1;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
        if (mci == NULL)
                return -ENOMEM;
index d3dd0dd4d46453a90f09e82cdb9820a677482d2e..6853935a2f4966abaa8560eaa80f8a17de795276 100644 (file)
@@ -240,7 +240,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index,
        tot_csrows = 1;
        for (i = 0; i < n_layers; i++) {
                tot_dimms *= layers[i].size;
-               if (layers[i].is_csrow)
+               if (layers[i].is_virt_csrow)
                        tot_csrows *= layers[i].size;
                else
                        tot_cschannels *= layers[i].size;
@@ -380,7 +380,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index,
                /* Increment csrow location */
                if (!rev_order) {
                        for (j = n_layers - 1; j >= 0; j--)
-                               if (!layers[j].is_csrow)
+                               if (!layers[j].is_virt_csrow)
                                        break;
                        chn++;
                        if (chn == tot_cschannels) {
@@ -389,7 +389,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned edac_index,
                        }
                } else {
                        for (j = n_layers - 1; j >= 0; j--)
-                               if (layers[j].is_csrow)
+                               if (layers[j].is_virt_csrow)
                                        break;
                        row++;
                        if (row == tot_csrows) {
index 15df2bcd3ffc32ffaa37fdde3a9411fc3729fdcf..55eff02ede26fdce92ef1a127d85e534a4d99e0d 100644 (file)
@@ -358,10 +358,10 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = I3000_RANKS / nr_channels;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = nr_channels;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
        if (!mci)
                return -ENOMEM;
index acb5d3976c346afccbf68794628fcca2b5e75745..818ee6ff0e95b2dcce52d7217f8b76ff2858584c 100644 (file)
@@ -343,10 +343,10 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = I3200_DIMMS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = nr_channels;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
                            false, sizeof(struct i3200_priv));
        if (!mci)
index 3626225e332fd29e60b3b9a365aeee0b6db5fb94..fda19b450d0708a9cc3d81fc93b487fbde969926 100644 (file)
@@ -1280,7 +1280,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
                        if (!MTR_DIMMS_PRESENT(mtr))
                                continue;
 
-                       dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers,
+                       dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
                                       channel / MAX_BRANCHES,
                                       channel % MAX_BRANCHES, slot);
 
@@ -1397,13 +1397,13 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_BRANCH;
        layers[0].size = MAX_BRANCHES;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = num_channels / MAX_BRANCHES;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        layers[2].type = EDAC_MC_LAYER_SLOT;
        layers[2].size = num_dimms_per_channel;
-       layers[2].is_csrow = true;
+       layers[2].is_virt_csrow = true;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
 
        if (mci == NULL)
index dd260c894a1a1bddf997705c63285ac304f3640b..a5a7ca43ea6cb902f6be11ed8ebfd371f1270a31 100644 (file)
@@ -844,7 +844,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
                if (!npages)
                        continue;
 
-               dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers,
+               dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
                               chan, rank, 0);
 
                dimm->nr_pages = npages;
@@ -932,10 +932,10 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
 
        layers[0].type = EDAC_MC_LAYER_CHANNEL;
        layers[0].size = 2;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_SLOT;
        layers[1].size = ranksperch;
-       layers[1].is_csrow = true;
+       layers[1].is_virt_csrow = true;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
                            false, sizeof(*priv));
        if (!mci) {
index 74b64c68892d96d3eaa02d4c7776bec3cf9d1001..676591e9a6f817b51db7a69ed4f642eb419a8d38 100644 (file)
@@ -1198,7 +1198,7 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
                        if (!MTR_DIMMS_PRESENT(mtr))
                                continue;
 
-                       dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers,
+                       dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
                                       channel / 2, channel % 2, slot);
 
                        size_mb =  pvt->dimm_info[slot][channel].megabytes;
@@ -1286,13 +1286,13 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
         */
        layers[0].type = EDAC_MC_LAYER_BRANCH;
        layers[0].size = MAX_BRANCHES;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = CHANNELS_PER_BRANCH;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        layers[2].type = EDAC_MC_LAYER_SLOT;
        layers[2].size = DIMMS_PER_CHANNEL;
-       layers[2].is_csrow = true;
+       layers[2].is_virt_csrow = true;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
 
        if (mci == NULL)
index f9a4fa4ee5db40b18f234e8f81ce06113038a8f3..7425f1794d6c153b21ae312c25f8c088b3659cf5 100644 (file)
@@ -795,7 +795,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
                        for (ch = 0; ch < MAX_CH_PER_BRANCH; ch++) {
                                int channel = to_channel(ch, branch);
 
-                               dimm = GET_POS(mci->layers, mci->dimms,
+                               dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
                                               mci->n_layers, branch, ch, slot);
 
                                dinfo = &pvt->dimm_info[slot][channel];
@@ -1044,13 +1044,13 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
        /* allocate a new MC control structure */
        layers[0].type = EDAC_MC_LAYER_BRANCH;
        layers[0].size = MAX_BRANCHES;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = MAX_CH_PER_BRANCH;
-       layers[1].is_csrow = true;
+       layers[1].is_virt_csrow = true;
        layers[2].type = EDAC_MC_LAYER_SLOT;
        layers[2].size = MAX_SLOTS;
-       layers[2].is_csrow = true;
+       layers[2].is_virt_csrow = true;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
 
        if (mci == NULL)
index cf27af876a96dbc87bb1c8474150c704610cd056..dfdee48f3a470f97751281754a1406a8fd49ec0d 100644 (file)
@@ -596,7 +596,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                        if (!DIMM_PRESENT(dimm_dod[j]))
                                continue;
 
-                       dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers,
+                       dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
                                       i, j, 0);
                        banks = numbank(MC_DOD_NUMBANK(dimm_dod[j]));
                        ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j]));
@@ -2229,10 +2229,10 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
 
        layers[0].type = EDAC_MC_LAYER_CHANNEL;
        layers[0].size = NUM_CHANS;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_SLOT;
        layers[1].size = MAX_DIMMS;
-       layers[1].is_csrow = true;
+       layers[1].is_virt_csrow = true;
        mci = edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers,
                            false, sizeof(*pvt));
        if (unlikely(!mci))
index 877ba543143263d12f5d6e9de04e83999abae19e..c0249f3d84eae702c9852bedd9749736e39caf60 100644 (file)
@@ -251,10 +251,10 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = I82443BXGX_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = I82443BXGX_NR_CHANS;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
        if (mci == NULL)
                return -ENOMEM;
index f493758d894d585e1b581c9e5839e655d95b5ff8..6ff59b00c331ea4c33f690a240009324b3094a04 100644 (file)
@@ -202,10 +202,10 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
         */
        layers[0].type = EDAC_MC_LAYER_CHANNEL;
        layers[0].size = 2;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_SLOT;
        layers[1].size = 8;
-       layers[1].is_csrow = true;
+       layers[1].is_virt_csrow = true;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
        if (!mci)
                return -ENOMEM;
index a42a5bd34e0f298ab0e4e7359325ab9b9a0a4b94..c9439047ba8e0280224cf10b4d053b981e79535d 100644 (file)
@@ -416,10 +416,10 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = I82875P_NR_CSROWS(nr_chans);
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = nr_chans;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
        if (!mci) {
                rc = -ENOMEM;
index 717f2088934248bac303c08c71ae296a817b3898..a4a676819e6532b30aa073b8a987cf7de1b88335 100644 (file)
@@ -548,10 +548,10 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
        /* assuming only one controller, index thus is 0 */
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = I82975X_NR_DIMMS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = I82975X_NR_CSROWS(chans);
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, sizeof(*pvt));
        if (!mci) {
                rc = -ENOMEM;
index 42e209cd7d21b11763c5c1c0d7334fa07e40f5d3..1640d54b61931bb7e774d8be53d9ad702141791c 100644 (file)
@@ -988,10 +988,10 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = 4;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = 1;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false,
                            sizeof(*pdata));
        if (!mci) {
index 87139cad92a14e75460ea50f70d6369f861241d8..59c399a5e4cff6093958aa9adfcb78b8862f55de 100644 (file)
@@ -711,10 +711,10 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = 1;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = 1;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, false,
                            sizeof(struct mv64x60_mc_pdata));
        if (!mci) {
index 634b919974b475e45d048cbdd95c15c33219f492..267e9ccfef3f851755913466ba02ea84be648c4c 100644 (file)
@@ -211,10 +211,10 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev,
 
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = PASEMI_EDAC_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = PASEMI_EDAC_NR_CHANS;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, false,
                            0);
        if (mci == NULL)
index 3917b0f6bde282139103140f02af5a6ecf9c70e6..77908cdb3be41376b6b0b82c30faf584e886eb86 100644 (file)
@@ -1287,10 +1287,10 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)
         */
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = ppc4xx_edac_nr_csrows;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = ppc4xx_edac_nr_chans;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers,
                            false, sizeof(struct ppc4xx_edac_pdata));
        if (mci == NULL) {
index 6a7a2ce2a05611cf686de079ce1cd73efaf28fbd..7b7eaf239e74ec9a5837c75cf16df8e6bfd604ab 100644 (file)
@@ -287,10 +287,10 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
        debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = R82600_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = R82600_NR_CHANS;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
        if (mci == NULL)
                return -ENOMEM;
index ff07f340e8e00dd41f3e3835edbca214ae57a36f..bb7e95faacbc17f5de8759e58eec5086828802c9 100644 (file)
@@ -572,7 +572,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                u32 mtr;
 
                for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) {
-                       dimm = GET_POS(mci->layers, mci->dimms, mci->n_layers,
+                       dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
                                       i, j, 0);
                        pci_read_config_dword(pvt->pci_tad[i],
                                              mtr_regs[j], &mtr);
@@ -1635,10 +1635,10 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
        /* allocate a new MC control structure */
        layers[0].type = EDAC_MC_LAYER_CHANNEL;
        layers[0].size = NUM_CHANNELS;
-       layers[0].is_csrow = false;
+       layers[0].is_virt_csrow = false;
        layers[1].type = EDAC_MC_LAYER_SLOT;
        layers[1].size = MAX_DIMMS;
-       layers[1].is_csrow = true;
+       layers[1].is_virt_csrow = true;
        mci = edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers,
                            false, sizeof(*pvt));
 
index 4aecb06d89b84ccf9120eda8cb1a645546e2a5c6..56b0ab010f7070532e6b8d4c238a6df403194069 100644 (file)
@@ -137,10 +137,10 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)
        /* A TILE MC has a single channel and one chip-select row. */
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = TILE_EDAC_NR_CSROWS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = TILE_EDAC_NR_CHANS;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, false,
                            sizeof(struct tile_edac_priv));
        if (mci == NULL)
index c5e54efff17edeb6e7a864badc2c14959bd31c20..219530b842b5c089c0ebe758870ac6d7220f617e 100644 (file)
@@ -344,10 +344,10 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
        /* FIXME: unconventional pvt_info usage */
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = X38_RANKS;
-       layers[0].is_csrow = true;
+       layers[0].is_virt_csrow = true;
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = x38_channel_num;
-       layers[1].is_csrow = false;
+       layers[1].is_virt_csrow = false;
        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false, 0);
        if (!mci)
                return -ENOMEM;
index 062a1a7a40f84c828b7fe14aea1dc845259fbf9b..e348afbf5225336fa453e00b8f35b286b3bf1c3a 100644 (file)
@@ -384,14 +384,14 @@ enum edac_mc_layer_type {
  * struct edac_mc_layer - describes the memory controller hierarchy
  * @layer:             layer type
  * @size:maximum size of the layer
- * @is_csrow:          This layer is part of the "csrow" when old API
+ * @is_virt_csrow:     This layer is part of the "csrow" when old API
  *                     compatibility mode is enabled. Otherwise, it is
  *                     a channel
  */
 struct edac_mc_layer {
        enum edac_mc_layer_type type;
        unsigned                size;
-       bool                    is_csrow;
+       bool                    is_virt_csrow;
 };
 
 /*
@@ -424,7 +424,7 @@ struct edac_mc_layer {
        __i;                                                            \
 })
 
-#define GET_POS(layers, var, nlayers, lay0, lay1, lay2) ({             \
+#define EDAC_DIMM_PTR(layers, var, nlayers, lay0, lay1, lay2) ({               \
        typeof(*var) __p;                                               \
        int ___i = GET_OFFSET(layers, nlayers, lay0, lay1, lay2);       \
        if (___i < 0)                                                   \