Include subrevision and variant fileds also to IP version.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 #define HWIP_MAX_INSTANCE      44
 
 #define HW_ID_MAX              300
-#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
-#define IP_VERSION_MAJ(ver) ((ver) >> 16)
-#define IP_VERSION_MIN(ver) (((ver) >> 8) & 0xFF)
-#define IP_VERSION_REV(ver) ((ver) & 0xFF)
+#define IP_VERSION_FULL(mj, mn, rv, var, srev) \
+       (((mj) << 24) | ((mn) << 16) | ((rv) << 8) | ((var) << 4) | (srev))
+#define IP_VERSION(mj, mn, rv)         IP_VERSION_FULL(mj, mn, rv, 0, 0)
+#define IP_VERSION_MAJ(ver)            ((ver) >> 24)
+#define IP_VERSION_MIN(ver)            (((ver) >> 16) & 0xFF)
+#define IP_VERSION_REV(ver)            (((ver) >> 8) & 0xFF)
+#define IP_VERSION_VARIANT(ver)                (((ver) >> 4) & 0xF)
+#define IP_VERSION_SUBREV(ver)         ((ver) & 0xF)
+#define IP_VERSION_MAJ_MIN_REV(ver)    ((ver) >> 8)
 
 struct amdgpu_ip_map_info {
        /* Map of logical to actual dev instances/mask */
 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,
                                         uint8_t ip, uint8_t inst)
 {
-       return adev->ip_versions[ip][inst];
+       /* This considers only major/minor/rev and ignores
+        * subrevision/variant fields.
+        */
+       return adev->ip_versions[ip][inst] & ~0xFFU;
 }
 
 #ifdef CONFIG_DEV_COREDUMP
 
 
 static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
 {
+       uint8_t num_base_address, subrev, variant;
        struct binary_header *bhdr;
        struct ip_discovery_header *ihdr;
        struct die_header *dhdr;
        uint16_t ip_offset;
        uint16_t num_dies;
        uint16_t num_ips;
-       uint8_t num_base_address;
        int hw_ip;
        int i, j, k;
        int r;
                                         * example.  On most chips there are multiple instances
                                         * with the same HWID.
                                         */
-                                       adev->ip_versions[hw_ip][ip->instance_number] =
-                                               IP_VERSION(ip->major, ip->minor, ip->revision);
+
+                                       if (ihdr->version < 3) {
+                                               subrev = 0;
+                                               variant = 0;
+                                       } else {
+                                               subrev = ip->sub_revision;
+                                               variant = ip->variant;
+                                       }
+
+                                       adev->ip_versions[hw_ip]
+                                                        [ip->instance_number] =
+                                               IP_VERSION_FULL(ip->major,
+                                                               ip->minor,
+                                                               ip->revision,
+                                                               variant,
+                                                               subrev);
                                }
                        }
 
 
                switch (type) {
                case AMD_IP_BLOCK_TYPE_GFX:
                        result->ip_discovery_version =
-                               amdgpu_ip_version(adev, GC_HWIP, 0);
+                               IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, GC_HWIP, 0));
                        break;
                case AMD_IP_BLOCK_TYPE_SDMA:
                        result->ip_discovery_version =
-                               amdgpu_ip_version(adev, SDMA0_HWIP, 0);
+                               IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, SDMA0_HWIP, 0));
                        break;
                case AMD_IP_BLOCK_TYPE_UVD:
                case AMD_IP_BLOCK_TYPE_VCN:
                case AMD_IP_BLOCK_TYPE_JPEG:
                        result->ip_discovery_version =
-                               amdgpu_ip_version(adev, UVD_HWIP, 0);
+                               IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, UVD_HWIP, 0));
                        break;
                case AMD_IP_BLOCK_TYPE_VCE:
                        result->ip_discovery_version =
-                               amdgpu_ip_version(adev, VCE_HWIP, 0);
+                               IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VCE_HWIP, 0));
                        break;
                case AMD_IP_BLOCK_TYPE_VPE:
                        result->ip_discovery_version =
-                               amdgpu_ip_version(adev, VPE_HWIP, 0);
+                               IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VPE_HWIP, 0));
                        break;
                default:
                        result->ip_discovery_version = 0;