arm64: dts: ti: k3-am69-sk: Add USB SuperSpeed support

AM69 SK board has two stacked USB3 connectors:
   1. USB3 (Stacked TypeA + TypeC)
   2. USB3 TypeA Hub interfaced through TUSB8041.

The board uses SERDES0 Lane 3 for USB3 IP. So update the
SerDes lane info for PCIe and USB. Add the pin mux data
and enable USB 3.0 support with its respective SERDES settings.

Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Enric Balletbo i Serra <eballetb@redhat.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20250108-am69sk-dt-usb-v3-1-bb4981534754@redhat.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 5f24a1608bdc4fef0610e2ba9a210264e3c4917e..b85227052f97eab2ac22e95d30ec3f6bfde85c0d 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -484,6 +484,12 @@
                >;
        };
 
+       main_usbss0_pins_default: main-usbss0-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */
+               >;
+       };
+
 };
 
 &wkup_pmx0 {
@@ -1307,6 +1313,14 @@
                cdns,phy-type = <PHY_TYPE_PCIE>;
                resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>, <&serdes_wiz0 3>;
        };
+
+       serdes0_usb_link: phy@3 {
+               reg = <3>;
+               cdns,num-lanes = <1>;
+               #phy-cells = <0>;
+               cdns,phy-type = <PHY_TYPE_USB3>;
+               resets = <&serdes_wiz0 4>;
+       };
 };
 
 &serdes_wiz1 {
@@ -1347,3 +1361,22 @@
        phy-names = "pcie-phy";
        num-lanes = <1>;
 };
+
+&usb_serdes_mux {
+       idle-states = <0>; /* USB0 to SERDES0 */
+};
+
+&usbss0 {
+       status = "okay";
+       pinctrl-0 = <&main_usbss0_pins_default>;
+       pinctrl-names = "default";
+       ti,vbus-divider;
+};
+
+&usb0 {
+       status = "okay";
+       dr_mode = "otg";
+       maximum-speed = "super-speed";
+       phys = <&serdes0_usb_link>;
+       phy-names = "cdns3,usb3-phy";
+};