arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl

Until now, all usdhc2 (SD-card) pinctrl labels pointed to one pinctrl
group "usdhc2grp" which was overwritten twice by the 100 and 200 MHz
modes. Fix this by using unique pinctrl names.

Additionally, adjust MX93_PAD_SD2_CLK__USDHC2_CLK pad drive-strength
according to values obtained by measurements from the PHYTEC hardware
department to improve signal integrity.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 3d5cd0561362b4b6bf897f9beb69ff2df7f459e1..541297052b62489abeafecd6803bdc137d775cf5 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -77,7 +77,7 @@
 
        pinctrl_usdhc2_default: usdhc2grp {
                fsl,pins = <
-                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x179e
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x159e
                        MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
                        MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e
@@ -87,9 +87,9 @@
                >;
        };
 
-       pinctrl_usdhc2_100mhz: usdhc2grp {
+       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
                fsl,pins = <
-                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x179e
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x159e
                        MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
                        MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e
@@ -99,9 +99,9 @@
                >;
        };
 
-       pinctrl_usdhc2_200mhz: usdhc2grp {
+       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
                fsl,pins = <
-                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x178e
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x158e
                        MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
                        MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x139e
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x139e