RAS/AMD/ATL: Fix MI300 bank hash

Apply the SID bits to the correct offset in the Bank value. Do this in
the temporary value so they don't need to be masked off later.

Fixes: 87a612375307 ("RAS/AMD/ATL: Add MI300 DRAM to normalized address translation support")
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: <stable@kernel.org>
Link: https://lore.kernel.org/r/20240607-mi300-dram-xl-fix-v1-1-2f11547a178c@amd.com

diff --git a/drivers/ras/amd/atl/umc.c b/drivers/ras/amd/atl/umc.c
index 59b6169093f7743cdca86578f494bac4b8fda383..5cb92330dc67737742aa48b812c9aa621edd0848 100644 (file)
--- a/drivers/ras/amd/atl/umc.c
+++ b/drivers/ras/amd/atl/umc.c
@@ -189,16 +189,11 @@ static unsigned long convert_dram_to_norm_addr_mi300(unsigned long addr)
 
        /* Calculate hash for PC bit. */
        if (addr_hash.pc.xor_enable) {
-               /* Bits SID[1:0] act as Bank[6:5] for PC hash, so apply them here. */
-               bank |= sid << 5;
-
                temp  = bitwise_xor_bits(col  & addr_hash.pc.col_xor);
                temp ^= bitwise_xor_bits(row  & addr_hash.pc.row_xor);
-               temp ^= bitwise_xor_bits(bank & addr_hash.bank_xor);
+               /* Bits SID[1:0] act as Bank[5:4] for PC hash, so apply them here. */
+               temp ^= bitwise_xor_bits((bank | sid << NUM_BANK_BITS) & addr_hash.bank_xor);
                pc   ^= temp;
-
-               /* Drop SID bits for the sake of debug printing later. */
-               bank &= 0x1F;
        }
 
        /* Reconstruct the normalized address starting with NA[4:0] = 0 */