powerpc/mm: Switch obsolete dssall to .long

commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.

The dssall ("Data Stream Stop All") instruction is obsolete altogether
with other Data Cache Instructions since ISA 2.03 (year 2006).

LLVM IAS does not support it but PPC970 seems to be using it.
This switches dssall to .long as there is no much point in fixing LLVM.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index f0c0816f572707a2f0467c6b78a21b869c17e539..d6a3cd1470599d6eb780b0af9afc6c563ce94d99 100644 (file)
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -212,6 +212,7 @@
 #define PPC_INST_COPY                  0x7c20060c
 #define PPC_INST_DCBA                  0x7c0005ec
 #define PPC_INST_DCBA_MASK             0xfc0007fe
+#define PPC_INST_DSSALL                        0x7e00066c
 #define PPC_INST_ISEL                  0x7c00001e
 #define PPC_INST_ISEL_MASK             0xfc00003e
 #define PPC_INST_LSWI                  0x7c0004aa
@@ -517,6 +518,7 @@
 #define        PPC_DCBZL(a, b)         stringify_in_c(.long PPC_RAW_DCBZL(a, b))
 #define        PPC_DIVDE(t, a, b)      stringify_in_c(.long PPC_RAW_DIVDE(t, a, b))
 #define        PPC_DIVDEU(t, a, b)     stringify_in_c(.long PPC_RAW_DIVDEU(t, a, b))
+#define PPC_DSSALL             stringify_in_c(.long PPC_INST_DSSALL)
 #define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LQARX(t, a, b, eh))
 #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LDARX(t, a, b, eh))
 #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LWARX(t, a, b, eh))

diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index f0271daa8f6a66df6d68a0719a2f795888a5dfef..77cd4c5a2d631f1a716b5a3341d0ecca5ce261f3 100644 (file)
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -82,7 +82,7 @@ void power4_idle(void)
                return;
 
        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-               asm volatile("DSSALL ; sync" ::: "memory");
+               asm volatile(PPC_DSSALL " ; sync" ::: "memory");
 
        power4_idle_nap();
 

diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 69df840f72535f5a52aec84eb086f27f295b223e..315e5e2ad7031898adc121ce43111870dc9e11b3 100644 (file)
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -129,7 +129,7 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
        mtspr   SPRN_HID0,r4
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        lwz     r8,TI_LOCAL_FLAGS(r2)   /* set napping bit */

diff --git a/arch/powerpc/kernel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S
index 225511d73bef560b536ab8bc2d9abc4a2b17b88c..f2e03ed423d0fc1cc660afc032899161e34acf3b 100644 (file)
--- a/arch/powerpc/kernel/l2cr_6xx.S
+++ b/arch/powerpc/kernel/l2cr_6xx.S
@@ -96,7 +96,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)
 
        /* Stop DST streams */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 
@@ -292,7 +292,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
        isync
 
        /* Stop DST streams */
-       DSSALL
+       PPC_DSSALL
        sync
 
        /* Get the current enable bit of the L3CR into r4 */
@@ -401,7 +401,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
 _GLOBAL(__flush_disable_L1)
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        sync
 

diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index f73f4d72fea43570a76eedafbebd5d00750ed49e..e0cbd63007f21e01e9ee8c444672f97fcfca65f9 100644 (file)
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume)
 #ifdef CONFIG_ALTIVEC
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif
        sync

diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S
index 6d3189830dd3230de6c4e08b587dd8244022497e..068a268a8013e9d916984d9eda1e0977f0098778 100644 (file)
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -142,7 +142,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
 _GLOBAL(swsusp_arch_resume)
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        sync
 

diff --git a/arch/powerpc/mm/mmu_context.c b/arch/powerpc/mm/mmu_context.c
index 18f20da0d3483fd7627f2c12197519dce4d9e71c..64290d343b5578d61f57149603c357b5071ba55f 100644 (file)
--- a/arch/powerpc/mm/mmu_context.c
+++ b/arch/powerpc/mm/mmu_context.c
@@ -79,7 +79,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
         * context
         */
        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-               asm volatile ("dssall");
+               asm volatile (PPC_DSSALL);
 
        if (new_on_cpu)
                radix_kvm_prefetch_workaround(next);

diff --git a/arch/powerpc/platforms/powermac/cache.S b/arch/powerpc/platforms/powermac/cache.S
index ced2254154860af64c21c69a733c9e458558b050..b8ae56e9f41466c8a6c28bb688912e69ed6fee16 100644 (file)
--- a/arch/powerpc/platforms/powermac/cache.S
+++ b/arch/powerpc/platforms/powermac/cache.S
@@ -48,7 +48,7 @@ flush_disable_75x:
 
        /* Stop DST streams */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 
@@ -197,7 +197,7 @@ flush_disable_745x:
        isync
 
        /* Stop prefetch streams */
-       DSSALL
+       PPC_DSSALL
        sync
 
        /* Disable L2 prefetching */