#define SGE_PAGE_SIZE          PAGE_SIZE
 #define SGE_PAGE_SHIFT         PAGE_SHIFT
 #define SGE_PAGE_ALIGN(addr)   PAGE_ALIGN((typeof(PAGE_SIZE))(addr))
+#define SGE_PAGES              (SGE_PAGE_SIZE * PAGES_PER_SGE)
 
 /* SGE ring related macros */
 #define NUM_RX_SGE_PAGES       2
 #define ETH_MAX_JUMBO_PACKET_SIZE      9600
 /* TCP with Timestamp Option (32) + IPv6 (40) */
 #define ETH_MAX_TPA_HEADER_SIZE                72
+#define ETH_MIN_TPA_HEADER_SIZE                40
 
        /* Max supported alignment is 256 (8 shift) */
 #define BNX2X_RX_ALIGN_SHIFT           min(8, L1_CACHE_SHIFT)
 
        u8                      wol;
 
+       bool                    gro_check;
+
        int                     rx_ring_size;
 
        u16                     tx_quick_cons_trip_int;
 
                u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len);
                tpa_info->full_page =
                        SGE_PAGE_SIZE * PAGES_PER_SGE / gro_size * gro_size;
+               /*
+                * FW 7.2.16 BUG workaround:
+                * if SGE size is (exactly) multiple gro_size
+                * fw will place one less frag on SGE.
+                * the calculation is done only for potentially
+                * dangerous MTUs.
+                */
+               if (unlikely(bp->gro_check))
+                       if (!(SGE_PAGE_SIZE * PAGES_PER_SGE % gro_size))
+                               tpa_info->full_page -= gro_size;
                tpa_info->gro_size = gro_size;
        }
 
         */
        dev->mtu = new_mtu;
 
+       bp->gro_check = bnx2x_need_gro_check(new_mtu);
+
        return bnx2x_reload_if_running(dev);
 }
 
 
         */
        return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS;
 }
+
+static inline bool bnx2x_need_gro_check(int mtu)
+{
+       return (SGE_PAGES / (mtu - ETH_MAX_TPA_HEADER_SIZE - 1)) !=
+               (SGE_PAGES / (mtu - ETH_MIN_TPA_HEADER_SIZE + 1));
+}
+
 /**
  * bnx2x_bz_fp - zero content of the fastpath structure.
  *
 
        if (CHIP_IS_E3B0(bp))
                bp->max_cos = BNX2X_MULTI_TX_COS_E3B0;
 
+       bp->gro_check = bnx2x_need_gro_check(bp->dev->mtu);
+
        return rc;
 }