drm/i915/display: don't allow DMC wakelock on older hardware

Only allow running DMC wakelock code if the display version is 20 or
greater.  Also check if DMC is loaded before enabling.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240412094148.808179-3-luciano.coelho@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 87dd07e0d138d75121cbeffcd9af858d4e082c90..e4015557af6a3b125354821910069296a287fa9b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -198,6 +198,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915)
        intel_dpll_init_clock_hook(i915);
        intel_init_display_hooks(i915);
        intel_fdi_init_hook(i915);
+       intel_dmc_wl_init(i915);
 }
 
 /* part #1: call before irq install */

diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index abe875690e70e132c1f3f43f8ead2ce700622833..bc3f3d6dfe1082f01ef3979752db841e3f473112 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -6,6 +6,7 @@
 #include <linux/kernel.h>
 
 #include "intel_de.h"
+#include "intel_dmc.h"
 #include "intel_dmc_regs.h"
 #include "intel_dmc_wl.h"
 
@@ -105,10 +106,23 @@ static bool intel_dmc_wl_check_range(u32 address)
        return wl_needed;
 }
 
+static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
+{
+       if (DISPLAY_VER(i915) < 20 ||
+           !intel_dmc_has_payload(i915))
+               return false;
+
+       return true;
+}
+
 void intel_dmc_wl_init(struct drm_i915_private *i915)
 {
        struct intel_dmc_wl *wl = &i915->display.wl;
 
+       /* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
+       if (DISPLAY_VER(i915) < 20)
+               return;
+
        INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
        spin_lock_init(&wl->lock);
        refcount_set(&wl->refcount, 0);
@@ -119,6 +133,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
        struct intel_dmc_wl *wl = &i915->display.wl;
        unsigned long flags;
 
+       if (!__intel_dmc_wl_supported(i915))
+               return;
+
        spin_lock_irqsave(&wl->lock, flags);
 
        if (wl->enabled)
@@ -143,6 +160,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
        struct intel_dmc_wl *wl = &i915->display.wl;
        unsigned long flags;
 
+       if (!__intel_dmc_wl_supported(i915))
+               return;
+
        flush_delayed_work(&wl->work);
 
        spin_lock_irqsave(&wl->lock, flags);
@@ -166,6 +186,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg)
        struct intel_dmc_wl *wl = &i915->display.wl;
        unsigned long flags;
 
+       if (!__intel_dmc_wl_supported(i915))
+               return;
+
        if (!intel_dmc_wl_check_range(reg.reg))
                return;
 
@@ -211,6 +234,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg)
        struct intel_dmc_wl *wl = &i915->display.wl;
        unsigned long flags;
 
+       if (!__intel_dmc_wl_supported(i915))
+               return;
+
        if (!intel_dmc_wl_check_range(reg.reg))
                return;