x86/smpboot: Remove initial_gs

Use the percpu offset directly to set GSBASE.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Reviewed-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Tested-by: Usama Arif <usama.arif@bytedance.com>
Signed-off-by: Usama Arif <usama.arif@bytedance.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>

diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index a336feef0af14318bf3776e417c4fbcd8277b976..f6a1737c77be2dc128147978e7f9f85945aed7a6 100644 (file)
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -59,7 +59,6 @@ extern struct real_mode_header *real_mode_header;
 extern unsigned char real_mode_blob_end[];
 
 extern unsigned long initial_code;
-extern unsigned long initial_gs;
 extern unsigned long initial_stack;
 #ifdef CONFIG_AMD_MEM_ENCRYPT
 extern unsigned long initial_vc_handler;

diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 236f2423454d1a1f4c10578ca64bd2a39749f7ef..9d2d88424c77e2f487478f5c88947e3fd585c8c2 100644 (file)
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -112,7 +112,6 @@ int x86_acpi_suspend_lowlevel(void)
 #else /* CONFIG_64BIT */
 #ifdef CONFIG_SMP
        current->thread.sp = (unsigned long)temp_stack + sizeof(temp_stack);
-       initial_gs = per_cpu_offset(smp_processor_id());
        smpboot_control = smp_processor_id();
 #endif
        initial_code = (unsigned long)wakeup_long64;

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 0ccca297e90e48503ff7fe80e0da14120f9236a6..069191e33490d967f065f3dab3379ce19f7fa0f7 100644 (file)
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -66,18 +66,10 @@ SYM_CODE_START_NOALIGN(startup_64)
 
        leaq    _text(%rip), %rdi
 
-       /*
-        * initial_gs points to initial fixed_percpu_data struct with storage for
-        * the stack protector canary. Global pointer fixups are needed at this
-        * stage, so apply them as is done in fixup_pointer(), and initialize %gs
-        * such that the canary can be accessed at %gs:40 for subsequent C calls.
-        */
+       /* Setup GSBASE to allow stack canary access for C code */
        movl    $MSR_GS_BASE, %ecx
-       movq    initial_gs(%rip), %rax
-       movq    $_text, %rdx
-       subq    %rdx, %rax
-       addq    %rdi, %rax
-       movq    %rax, %rdx
+       leaq    INIT_PER_CPU_VAR(fixed_percpu_data)(%rip), %rdx
+       movl    %edx, %eax
        shrq    $32,  %rdx
        wrmsr
 
@@ -294,8 +286,11 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL)
         * the per cpu areas are set up.
         */
        movl    $MSR_GS_BASE,%ecx
-       movl    initial_gs(%rip),%eax
-       movl    initial_gs+4(%rip),%edx
+#ifndef CONFIG_SMP
+       leaq    INIT_PER_CPU_VAR(fixed_percpu_data)(%rip), %rdx
+#endif
+       movl    %edx, %eax
+       shrq    $32, %rdx
        wrmsr
 
        /* Setup and Load IDT */
@@ -437,7 +432,6 @@ SYM_CODE_END(vc_boot_ghcb)
        __REFDATA
        .balign 8
 SYM_DATA(initial_code, .quad x86_64_start_kernel)
-SYM_DATA(initial_gs,   .quad INIT_PER_CPU_VAR(fixed_percpu_data))
 #ifdef CONFIG_AMD_MEM_ENCRYPT
 SYM_DATA(initial_vc_handler,   .quad handle_vc_boot_ghcb)
 #endif

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a22460a07cf861f14346751f7d4e794d4daed255..b04520085582baeee135d0722892c02f2f836c57 100644 (file)
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1084,8 +1084,6 @@ int common_cpu_up(unsigned int cpu, struct task_struct *idle)
 #ifdef CONFIG_X86_32
        /* Stack for startup_32 can be just as for start_secondary onwards */
        per_cpu(pcpu_hot.top_of_stack, cpu) = task_top_of_stack(idle);
-#else
-       initial_gs = per_cpu_offset(cpu);
 #endif
        return 0;
 }