MIPS: barrier: Clean up __sync() definition

Implement __sync() using the new __SYNC() infrastructure, which will
take care of not emitting an instruction for old R3k CPUs that don't
support it. The only behavioral difference is that __sync() will now
provide a compiler barrier on these old CPUs, but that seems like
reasonable behavior anyway.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org

diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h
index 657ec01120a4ee55a19a07b18fe7d70c6e67813c..a117c6d95038dfda91c9e8e009800b029b79b1bf 100644 (file)
--- a/arch/mips/include/asm/barrier.h
+++ b/arch/mips/include/asm/barrier.h
@@ -11,20 +11,10 @@
 #include <asm/addrspace.h>
 #include <asm/sync.h>
 
-#ifdef CONFIG_CPU_HAS_SYNC
-#define __sync()                               \
-       __asm__ __volatile__(                   \
-               ".set   push\n\t"               \
-               ".set   noreorder\n\t"          \
-               ".set   mips2\n\t"              \
-               "sync\n\t"                      \
-               ".set   pop"                    \
-               : /* no output */               \
-               : /* no input */                \
-               : "memory")
-#else
-#define __sync()       do { } while(0)
-#endif
+static inline void __sync(void)
+{
+       asm volatile(__SYNC(full, always) ::: "memory");
+}
 
 static inline void rmb(void)
 {