arm64: dts: ti: k3-am64*: Disable ethernet by default at SoC level

External interfaces should be disabled at the SoC DTSI level, since
the node is incomplete. Disable Ethernet switch and ports in SoC DTSI
and enable them in the board DTS. If the board DTS includes a SoM DTSI
that completes the node description, enable the Ethernet switch and
ports in SoM DTSI.

Reflect this change in SoM DTSIs by removing ethernet port disable.

Signed-off-by: Logan Bristol <logan.bristol@utexas.edu>
Acked-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Acked-by: Josua Mayer <josua@solid-run.com>
Link: https://lore.kernel.org/r/20240809135753.1186-1-logan.bristol@utexas.edu
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index f8370dd033502c798f56fd4c65bb611ebccb8dff..69c5af58b72791af48c4eb8ad94923a9208060f6 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -677,6 +677,7 @@
                assigned-clock-parents = <&k3_clks 13 9>;
                clock-names = "fck";
                power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
 
                dmas = <&main_pktdma 0xC500 15>,
                       <&main_pktdma 0xC501 15>,
@@ -701,6 +702,7 @@
                                phys = <&phy_gmii_sel 1>;
                                mac-address = [00 00 00 00 00 00];
                                ti,syscon-efuse = <&main_conf 0x200>;
+                               status = "disabled";
                        };
 
                        cpsw_port2: port@2 {
@@ -709,6 +711,7 @@
                                label = "port2";
                                phys = <&phy_gmii_sel 2>;
                                mac-address = [00 00 00 00 00 00];
+                               status = "disabled";
                        };
                };
 

diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index ea7c58fb67e207d03bc879f5ef5d4420619d26ea..6bece2fb4e953124404b413ae3b43cfbc143a499 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -185,6 +185,7 @@
 &cpsw3g {
        pinctrl-names = "default";
        pinctrl-0 = <&cpsw_rgmii1_pins_default>;
+       status = "okay";
 };
 
 &cpsw3g_mdio {
@@ -208,10 +209,7 @@
 &cpsw_port1 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy1>;
-};
-
-&cpsw_port2 {
-       status = "disabled";
+       status = "okay";
 };
 
 &mailbox0_cluster2 {

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 42015a55e0d39fb29b1f2ab4e584d7b6756268bc..97ca16f00cd260d88ebf638bfba22b7afc72f6b0 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -616,17 +616,20 @@
        bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
+       status = "okay";
 };
 
 &cpsw_port1 {
        bootph-all;
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
+       status = "okay";
 };
 
 &cpsw_port2 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy3>;
+       status = "okay";
 };
 
 &cpsw3g_mdio {

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 44ecbcf1c84474cf639c809e3463b5e8b68993f8..86369525259c3e432a4f2141e9aaf3da3a5b375d 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -527,16 +527,19 @@
 &cpsw3g {
        pinctrl-names = "default";
        pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
+       status = "okay";
 };
 
 &cpsw_port1 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
+       status = "okay";
 };
 
 &cpsw_port2 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy1>;
+       status = "okay";
 };
 
 &cpsw3g_mdio {

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
index c19d0b8bbf0fca6fb859efe78629e0ce946c456c..a5cec9a075109aeec335e3f4d22a9fd60a3cd813 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
@@ -177,6 +177,7 @@
 &cpsw3g {
        pinctrl-names = "default";
        pinctrl-0 = <&rgmii1_default_pins>;
+       status = "okay";
 };
 
 &cpsw3g_mdio {
@@ -210,10 +211,7 @@
 &cpsw_port1 {
        phy-mode = "rgmii-id";
        phy-handle = <&ethernet_phy0>;
-};
-
-&cpsw_port2 {
-       status = "disabled";
+       status = "okay";
 };
 
 &icssg1_mdio {

diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
index c2a62cb763a5937eba384bd9c1d25e480c76692b..e06a3b178b3468b661556840b29ebe6580ff10ce 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
@@ -181,15 +181,13 @@
 &cpsw3g {
        pinctrl-names = "default";
        pinctrl-0 = <&cpsw_pins>;
+       status = "okay";
 };
 
 &cpsw_port1 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
-};
-
-&cpsw_port2 {
-       status = "disabled";
+       status = "okay";
 };
 
 &cpsw3g_mdio {