/* Patch AST2500/AST2510 */
                        if ((pdev->revision & 0xf0) == 0x40) {
-                               if (!(vgacrd0 & AST_VRAM_INIT_STATUS_MASK))
+                               if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK))
                                        ast_patch_ahb_2500(regs);
                        }
 
 
 
 static void ast_detect_widescreen(struct ast_device *ast)
 {
-       u8 jreg;
+       u8 vgacrd0;
 
        /* Check if we support wide screen */
        switch (AST_GEN(ast)) {
                ast->support_wide_screen = false;
                break;
        default:
-               jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
-               if (!(jreg & 0x80))
+               vgacrd0 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd0);
+               if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_BY_BMC))
                        ast->support_wide_screen = true;
-               else if (jreg & 0x01)
+               else if (vgacrd0 & AST_IO_VGACRD0_IKVM_WIDESCREEN)
                        ast->support_wide_screen = true;
                else {
                        ast->support_wide_screen = false;
 
        u8 reg;
 
        reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
-       if ((reg & AST_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */
+       if ((reg & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */
                /* Clear bus lock condition */
                ast_patch_ahb_2500(ast->regs);
 
 
 #define AST_IO_VGACRCB_HWC_16BPP       BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
 #define AST_IO_VGACRCB_HWC_ENABLED     BIT(1)
 
+/* mirrors SCU100[7:0] */
+#define AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK   GENMASK(7, 6)
+#define AST_IO_VGACRD0_VRAM_INIT_BY_BMC                BIT(7)
+#define AST_IO_VGACRD0_VRAM_INIT_READY         BIT(6)
+#define AST_IO_VGACRD0_IKVM_WIDESCREEN         BIT(0)
+
 #define AST_IO_VGACRD1_MCU_FW_EXECUTING                BIT(5)
 /* Display Transmitter Type */
 #define AST_IO_VGACRD1_TX_TYPE_MASK            GENMASK(3, 1)
 #define AST_IO_VGAIR1_R                        (0x5A)
 #define AST_IO_VGAIR1_VREFRESH         BIT(3)
 
-
-#define AST_VRAM_INIT_STATUS_MASK      GENMASK(7, 6)
-//#define AST_VRAM_INIT_BY_BMC         BIT(7)
-//#define AST_VRAM_INIT_READY          BIT(6)
-
 /*
  * AST DisplayPort
  */