};
 
        msiof0: spi@e6e20000 {
-               compatible = "renesas,msiof-r8a7791";
+               compatible = "renesas,msiof-r8a7791",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e20000 0 0x0064>;
                interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
        };
 
        msiof1: spi@e6e10000 {
-               compatible = "renesas,msiof-r8a7791";
+               compatible = "renesas,msiof-r8a7791",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e10000 0 0x0064>;
                interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
        };
 
        msiof2: spi@e6e00000 {
-               compatible = "renesas,msiof-r8a7791";
+               compatible = "renesas,msiof-r8a7791",
+                            "renesas,rcar-gen2-msiof";
                reg = <0 0xe6e00000 0 0x0064>;
                interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;