Adhere to Linux kernel coding style.
Reported by checkpatch
CHECK: Avoid CamelCase: <EventNone>
CHECK: Avoid CamelCase: <EventDevTrg>
CHECK: Avoid CamelCase: <EventDevClr>
CHECK: Avoid CamelCase: <EventIfc>
Signed-off-by: Michael Rubin <matchstick@neverthere.org>
Link: https://lore.kernel.org/r/20250408222040.186881-2-matchstick@neverthere.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
        retval = push_gpib_event_nolock(board, event_type);
        spin_unlock_irqrestore(&board->event_queue.lock, flags);
 
-       if (event_type == EventDevTrg)
+       if (event_type == EVENT_DEV_TRG)
                board->status |= DTAS;
-       if (event_type == EventDevClr)
+       if (event_type == EVENT_DEV_CLR)
                board->status |= DCAS;
 
        return retval;
        gpib_event_t *event;
 
        if (num_gpib_events(queue) == 0) {
-               *event_type = EventNone;
+               *event_type = EVENT_NONE;
                return 0;
        }
 
 
        status2 = read_byte(nec_priv, ISR2);
 
        if (status0 & FLUKE_IFCI_BIT) {
-               push_gpib_event(board, EventIFC);
+               push_gpib_event(board, EVENT_IFC);
                retval = IRQ_HANDLED;
        }
 
 
        fifo_status = fifos_read(priv, FIFO_CONTROL_STATUS_REG);
 
        if (status0 & IFC_INTERRUPT_BIT) {
-               push_gpib_event(board, EventIFC);
+               push_gpib_event(board, EVENT_IFC);
                retval = IRQ_HANDLED;
        }
 
 
        isr3_bits = ines_inb(priv, ISR3);
        isr4_bits = ines_inb(priv, ISR4);
        if (isr3_bits & IFC_ACTIVE_BIT) {
-               push_gpib_event(board, EventIFC);
+               push_gpib_event(board, EVENT_IFC);
                wake++;
        }
        if (isr3_bits & FIFO_ERROR_BIT)
 
 
                // ignore device clear events if we are controller in charge
                if ((address_status_bits & HR_CIC) == 0) {
-                       push_gpib_event(board, EventDevClr);
+                       push_gpib_event(board, EVENT_DEV_CLR);
                        set_bit(DEV_CLEAR_BN, &priv->state);
                }
        }
 
        if (status1 & HR_DET)
-               push_gpib_event(board, EventDevTrg);
+               push_gpib_event(board, EVENT_DEV_TRG);
 
        // Addressing status has changed
        if (status2 & HR_ADSC)
 
        }
 
        if (status1 & HR_IFC) {
-               push_gpib_event(board, EventIFC);
+               push_gpib_event(board, EVENT_IFC);
                clear_bit(CIC_NUM, &board->status);
        }
 
        if (status1 & HR_GET) {
-               push_gpib_event(board, EventDevTrg);
+               push_gpib_event(board, EVENT_DEV_TRG);
                // clear dac holdoff
                write_byte(priv, AUX_VAL, AUXCR);
        }
 
        if (status1 & HR_DCAS) {
-               push_gpib_event(board, EventDevClr);
+               push_gpib_event(board, EVENT_DEV_CLR);
                // clear dac holdoff
                write_byte(priv, AUX_VAL, AUXCR);
                set_bit(DEV_CLEAR_BN, &priv->state);
 
        imr3_bits = priv->imr3_bits;
 
        if (isr0_bits & TNT_IFCI_BIT)
-               push_gpib_event(board, EventIFC);
+               push_gpib_event(board, EVENT_IFC);
        //XXX don't need this wakeup, one below should do?
 //             wake_up_interruptible(&board->wait);
 
 
 };
 
 enum gpib_events {
-       EventNone = 0,
-       EventDevTrg = 1,
-       EventDevClr = 2,
-       EventIFC = 3
+       EVENT_NONE = 0,
+       EVENT_DEV_TRG = 1,
+       EVENT_DEV_CLR = 2,
+       EVENT_IFC = 3
 };
 
 enum gpib_stb {