drm/msm/dpu: drop dpu_csc_cfg from dpu_plane

Simplify code surrounding CSC table setup by removing struct dpu_csc_cfg
pointer from dpu_plane and getting it directly at the CSC setup time.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210930140002.308628-8-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 1375042df45113c57928fa603ab0c37dda2a3d06..d77eb7da5dafce5fb0f31760e14a1d6a8414bd81 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -539,7 +539,7 @@ static void dpu_hw_sspp_setup_sourceaddress(struct dpu_hw_pipe *ctx,
 }
 
 static void dpu_hw_sspp_setup_csc(struct dpu_hw_pipe *ctx,
-               struct dpu_csc_cfg *data)
+               const struct dpu_csc_cfg *data)
 {
        u32 idx;
        bool csc10 = false;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index 27263bc1a1ef10acdfc959dd43d6f62b0db99f14..e8939d7387cb7f8ecaf1488bdb1f36b907c0f820 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -262,7 +262,7 @@ struct dpu_hw_sspp_ops {
         * @ctx: Pointer to pipe context
         * @data: Pointer to config structure
         */
-       void (*setup_csc)(struct dpu_hw_pipe *ctx, struct dpu_csc_cfg *data);
+       void (*setup_csc)(struct dpu_hw_pipe *ctx, const struct dpu_csc_cfg *data);
 
        /**
         * setup_solidfill - enable/disable colorfill

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
index f94584c982cd95e6d5c55b360221003f601b7a5a..aad85116b0a0776f5cf10e975197562ed0d7cadc 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
@@ -374,7 +374,7 @@ u32 dpu_hw_get_scaler3_ver(struct dpu_hw_blk_reg_map *c,
 
 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map *c,
                u32 csc_reg_off,
-               struct dpu_csc_cfg *data, bool csc10)
+               const struct dpu_csc_cfg *data, bool csc10)
 {
        static const u32 matrix_shift = 7;
        u32 clamp_shift = csc10 ? 16 : 8;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index 6d4911957e333150a138a494088d01145ef3074d..39134754579e835c443459e3bce3cfce76e91697 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
@@ -322,6 +322,6 @@ u32 dpu_hw_get_scaler3_ver(struct dpu_hw_blk_reg_map *c,
 
 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map  *c,
                u32 csc_reg_off,
-               struct dpu_csc_cfg *data, bool csc10);
+               const struct dpu_csc_cfg *data, bool csc10);
 
 #endif /* _DPU_HW_UTIL_H */

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 8807641e6f902fb45ecc39cab2c01146114a1197..0da88f6399cc9b045f6ea0929d722152b17bda5a 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -90,7 +90,6 @@ enum dpu_plane_qos {
 /*
  * struct dpu_plane - local dpu plane structure
  * @aspace: address space pointer
- * @csc_ptr: Points to dpu_csc_cfg structure to use for current
  * @mplane_list: List of multirect planes of the same pipe
  * @catalog: Points to dpu catalog structure
  * @revalidate: force revalidation of all the plane properties
@@ -111,8 +110,6 @@ struct dpu_plane {
        struct list_head mplane_list;
        struct dpu_mdss_cfg *catalog;
 
-       struct dpu_csc_cfg *csc_ptr;
-
        const struct dpu_sspp_sub_blks *pipe_sblk;
 
        /* debugfs related stuff */
@@ -607,51 +604,59 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu,
        scale_cfg->enable = 1;
 }
 
-static void _dpu_plane_setup_csc(struct dpu_plane *pdpu)
-{
-       static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = {
-               {
-                       /* S15.16 format */
-                       0x00012A00, 0x00000000, 0x00019880,
-                       0x00012A00, 0xFFFF9B80, 0xFFFF3000,
-                       0x00012A00, 0x00020480, 0x00000000,
+static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = {
+       {
+               /* S15.16 format */
+               0x00012A00, 0x00000000, 0x00019880,
+               0x00012A00, 0xFFFF9B80, 0xFFFF3000,
+               0x00012A00, 0x00020480, 0x00000000,
+       },
+       /* signed bias */
+       { 0xfff0, 0xff80, 0xff80,},
+       { 0x0, 0x0, 0x0,},
+       /* unsigned clamp */
+       { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
+       { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
+};
+
+static const struct dpu_csc_cfg dpu_csc10_YUV2RGB_601L = {
+       {
+               /* S15.16 format */
+               0x00012A00, 0x00000000, 0x00019880,
+               0x00012A00, 0xFFFF9B80, 0xFFFF3000,
+               0x00012A00, 0x00020480, 0x00000000,
                },
-               /* signed bias */
-               { 0xfff0, 0xff80, 0xff80,},
-               { 0x0, 0x0, 0x0,},
-               /* unsigned clamp */
-               { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
-               { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
-       };
-       static const struct dpu_csc_cfg dpu_csc10_YUV2RGB_601L = {
-               {
-                       /* S15.16 format */
-                       0x00012A00, 0x00000000, 0x00019880,
-                       0x00012A00, 0xFFFF9B80, 0xFFFF3000,
-                       0x00012A00, 0x00020480, 0x00000000,
-                       },
-               /* signed bias */
-               { 0xffc0, 0xfe00, 0xfe00,},
-               { 0x0, 0x0, 0x0,},
-               /* unsigned clamp */
-               { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
-               { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
-       };
+       /* signed bias */
+       { 0xffc0, 0xfe00, 0xfe00,},
+       { 0x0, 0x0, 0x0,},
+       /* unsigned clamp */
+       { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
+       { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
+};
+
+static const struct dpu_csc_cfg *_dpu_plane_get_csc(struct dpu_plane *pdpu, const struct dpu_format *fmt)
+{
+       const struct dpu_csc_cfg *csc_ptr;
 
        if (!pdpu) {
                DPU_ERROR("invalid plane\n");
-               return;
+               return NULL;
        }
 
+       if (!DPU_FORMAT_IS_YUV(fmt))
+               return NULL;
+
        if (BIT(DPU_SSPP_CSC_10BIT) & pdpu->features)
-               pdpu->csc_ptr = (struct dpu_csc_cfg *)&dpu_csc10_YUV2RGB_601L;
+               csc_ptr = &dpu_csc10_YUV2RGB_601L;
        else
-               pdpu->csc_ptr = (struct dpu_csc_cfg *)&dpu_csc_YUV2RGB_601L;
+               csc_ptr = &dpu_csc_YUV2RGB_601L;
 
        DPU_DEBUG_PLANE(pdpu, "using 0x%X 0x%X 0x%X...\n",
-                       pdpu->csc_ptr->csc_mv[0],
-                       pdpu->csc_ptr->csc_mv[1],
-                       pdpu->csc_ptr->csc_mv[2]);
+                       csc_ptr->csc_mv[0],
+                       csc_ptr->csc_mv[1],
+                       csc_ptr->csc_mv[2]);
+
+       return csc_ptr;
 }
 
 static void _dpu_plane_setup_scaler(struct dpu_plane *pdpu,
@@ -1061,8 +1066,13 @@ void dpu_plane_flush(struct drm_plane *plane)
        else if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG)
                /* force 100% alpha */
                _dpu_plane_color_fill(pdpu, pdpu->color_fill, 0xFF);
-       else if (pdpu->pipe_hw && pdpu->csc_ptr && pdpu->pipe_hw->ops.setup_csc)
-               pdpu->pipe_hw->ops.setup_csc(pdpu->pipe_hw, pdpu->csc_ptr);
+       else if (pdpu->pipe_hw && pdpu->pipe_hw->ops.setup_csc) {
+               const struct dpu_format *fmt = to_dpu_format(msm_framebuffer_format(plane->state->fb));
+               const struct dpu_csc_cfg *csc_ptr = _dpu_plane_get_csc(pdpu, fmt);
+
+               if (csc_ptr)
+                       pdpu->pipe_hw->ops.setup_csc(pdpu->pipe_hw, csc_ptr);
+       }
 
        /* flag h/w flush complete */
        if (plane->state)
@@ -1194,12 +1204,6 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
 
                        pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, cdp_cfg);
                }
-
-               /* update csc */
-               if (DPU_FORMAT_IS_YUV(fmt))
-                       _dpu_plane_setup_csc(pdpu);
-               else
-                       pdpu->csc_ptr = NULL;
        }
 
        _dpu_plane_set_qos_lut(plane, fb, &pipe_cfg);