drm/amd/display: Workaround for some legacy DP-VGA dongles

[Why]
Maximum resolution is 1440*900 when connecting to FHD monitor via some DP-VGA
dongles. The display EDID reading fails over AUX/I2C via DP->VGA dongle, and
this leads to the maximum resolution 1920*1080 cannot be obtained from EDID.

[How]
Provide a workaround for some legacy DP-VGA dongles with a longer aux delay.

Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
index 26f3d5dd0453087b4eb816ef0035ed9baf9799f0..ae6484ab567b7a2a2d2ea348fa835d0ab8a6b818 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
@@ -39,12 +39,14 @@
 
 #define DC_LOGGER_INIT(logger)
 
-/*DP to Dual link DVI converter*/
+static const uint8_t DP_VGA_DONGLE_BRANCH_DEV_NAME[] = "DpVga";
+/* DP to Dual link DVI converter */
 static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
 static const uint8_t DP_DVI_CONVERTER_ID_5[] = "3393N2";
 
 #define AUX_POWER_UP_WA_DELAY 500
 #define I2C_OVER_AUX_DEFER_WA_DELAY 70
+#define DPVGA_DONGLE_AUX_DEFER_WA_DELAY 40
 #define I2C_OVER_AUX_DEFER_WA_DELAY_1MS 1
 
 /* CV smart dongle slave address for retrieving supported HDTV modes*/
@@ -292,6 +294,15 @@ static uint32_t defer_delay_converter_wa(
 {
        struct dc_link *link = ddc->link;
 
+       if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER &&
+               link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
+               !memcmp(link->dpcd_caps.branch_dev_name,
+                   DP_VGA_DONGLE_BRANCH_DEV_NAME,
+                       sizeof(link->dpcd_caps.branch_dev_name)))
+
+               return defer_delay > DPVGA_DONGLE_AUX_DEFER_WA_DELAY ?
+                       defer_delay : DPVGA_DONGLE_AUX_DEFER_WA_DELAY;
+
        if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
            !memcmp(link->dpcd_caps.branch_dev_name,
                    DP_DVI_CONVERTER_ID_4,