}
 #endif
 
+#ifdef CONFIG_SOC_DRA7XX
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
+
+static void __init dra7x_evm_mmc_quirk(void)
+{
+       if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
+               dra7_hsmmc_data_mmc1.version = "rev11";
+               dra7_hsmmc_data_mmc1.max_freq = 96000000;
+
+               dra7_hsmmc_data_mmc2.version = "rev11";
+               dra7_hsmmc_data_mmc2.max_freq = 48000000;
+
+               dra7_hsmmc_data_mmc3.version = "rev11";
+               dra7_hsmmc_data_mmc3.max_freq = 48000000;
+       }
+}
+#endif
+
 static struct pcs_pdata pcs_pdata;
 
 void omap_pcs_legacy_init(int irq, void (*rearm)(void))
                       &omap4_iommu_pdata),
        OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
                       &omap4_iommu_pdata),
+#endif
+#ifdef CONFIG_SOC_DRA7XX
+       OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
+                      &dra7_hsmmc_data_mmc1),
+       OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
+                      &dra7_hsmmc_data_mmc2),
+       OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
+                      &dra7_hsmmc_data_mmc3),
 #endif
        /* Common auxdata */
        OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
 #endif
 #ifdef CONFIG_SOC_OMAP5
        { "ti,omap5-uevm", omap5_uevm_legacy_init, },
+#endif
+#ifdef CONFIG_SOC_DRA7XX
+       { "ti,dra7-evm", dra7x_evm_mmc_quirk, },
 #endif
        { /* sentinel */ },
 };