case WM8994_FLL_SRC_LRCLK:
        case WM8994_FLL_SRC_BCLK:
                break;
+       case WM8994_FLL_SRC_INTERNAL:
+               freq_in = 12000000;
+               freq_out = 12000000;
+               break;
        default:
                return -EINVAL;
        }
                                    fll.n << WM8994_FLL1_N_SHIFT);
 
        snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_5 + reg_offset,
-                           WM8958_FLL1_BYP |
+                           WM8994_FLL1_FRC_NCO | WM8958_FLL1_BYP |
                            WM8994_FLL1_REFCLK_DIV_MASK |
                            WM8994_FLL1_REFCLK_SRC_MASK,
+                           ((src == WM8994_FLL_SRC_INTERNAL)
+                            << WM8994_FLL1_FRC_NCO_SHIFT) |
                            (fll.clk_ref_div << WM8994_FLL1_REFCLK_DIV_SHIFT) |
                            (src - 1));
 
                        }
                }
 
+               reg = WM8994_FLL1_ENA;
+
                if (fll.k)
-                       reg = WM8994_FLL1_ENA | WM8994_FLL1_FRAC;
-               else
-                       reg = WM8994_FLL1_ENA;
+                       reg |= WM8994_FLL1_FRAC;
+               if (src == WM8994_FLL_SRC_INTERNAL)
+                       reg |= WM8994_FLL1_OSC_ENA;
+
                snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
-                                   WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
-                                   reg);
+                                   WM8994_FLL1_ENA | WM8994_FLL1_OSC_ENA |
+                                   WM8994_FLL1_FRAC, reg);
 
                if (wm8994->fll_locked_irq) {
                        timeout = wait_for_completion_timeout(&wm8994->fll_locked[id],
 
 #define WM8994_FLL1 1
 #define WM8994_FLL2 2
 
-#define WM8994_FLL_SRC_MCLK1  1
-#define WM8994_FLL_SRC_MCLK2  2
-#define WM8994_FLL_SRC_LRCLK  3
-#define WM8994_FLL_SRC_BCLK   4
+#define WM8994_FLL_SRC_MCLK1    1
+#define WM8994_FLL_SRC_MCLK2    2
+#define WM8994_FLL_SRC_LRCLK    3
+#define WM8994_FLL_SRC_BCLK     4
+#define WM8994_FLL_SRC_INTERNAL 5
 
 enum wm8994_vmid_mode {
        WM8994_VMID_NORMAL,