ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board

Those pins are used for Ethernet 1 and 2 on STM32MP13F-DK board.
ethernet1: RMII with crystal.
ethernet2: RMII without crystal.
Add analog gpio pin configuration ("sleep") to manage power mode on
stm32mp13.

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
index 22cd07196499b2f8a30fe9e10c9ed098cbcaf4a9..fc56be60cfcd721441fafbbca33553d38311488a 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
@@ -172,6 +172,77 @@
                };
        };
 
+       eth1_rmii_pins_a: eth1-rmii-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */
+                                <STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */
+                                <STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */
+                                <STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
+                                <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
+                                <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+
+               pins2 {
+                       pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */
+                                <STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */
+                                <STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
+                       bias-disable;
+               };
+
+       };
+
+       eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */
+                                <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */
+                                <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */
+                                <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
+                                <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
+                                <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
+                                <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */
+                                <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */
+                                <STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */
+               };
+       };
+
+       eth2_rmii_pins_a: eth2-rmii-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */
+                                <STM32_PINMUX('G', 11, AF10)>, /* ETH_RMII_TXD1 */
+                                <STM32_PINMUX('G', 8, AF13)>, /* ETH_RMII_ETHCK */
+                                <STM32_PINMUX('F', 6, AF11)>, /* ETH_RMII_TX_EN */
+                                <STM32_PINMUX('B', 2, AF11)>, /* ETH_MDIO */
+                                <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+
+               pins2 {
+                       pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RMII_RXD0 */
+                                <STM32_PINMUX('E', 2, AF10)>, /* ETH_RMII_RXD1 */
+                                <STM32_PINMUX('A', 12, AF11)>; /* ETH_RMII_CRS_DV */
+                       bias-disable;
+               };
+       };
+
+       eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RMII_TXD0 */
+                                <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RMII_TXD1 */
+                                <STM32_PINMUX('G', 8, ANALOG)>, /* ETH_RMII_ETHCK */
+                                <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RMII_TX_EN */
+                                <STM32_PINMUX('B', 2, ANALOG)>, /* ETH_MDIO */
+                                <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */
+                                <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RMII_RXD0 */
+                                <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RMII_RXD1 */
+                                <STM32_PINMUX('A', 12, ANALOG)>; /* ETH_RMII_CRS_DV */
+               };
+       };
+
        i2c1_pins_a: i2c1-0 {
                pins {
                        pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */