#include "amdgpu_ucode.h"
 #include "amdgpu_amdkfd.h"
 #include "amdgpu_gem.h"
+#include "amdgpu_reset.h"
 
 #include "bif/bif_4_1_d.h"
 #include "bif/bif_4_1_sh_mask.h"
                                        uint16_t pasid, uint32_t flush_type,
                                        bool all_hub, uint32_t inst)
 {
+       u32 mask = 0x0;
        int vmid;
-       unsigned int tmp;
 
-       if (amdgpu_in_reset(adev))
-               return -EIO;
+       if (!down_read_trylock(&adev->reset_domain->sem))
+               return 0;
 
        for (vmid = 1; vmid < 16; vmid++) {
+               u32 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
 
-               tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid);
                if ((tmp & ATC_VMID0_PASID_MAPPING__VALID_MASK) &&
-                       (tmp & ATC_VMID0_PASID_MAPPING__PASID_MASK) == pasid) {
-                       WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
-                       RREG32(mmVM_INVALIDATE_RESPONSE);
-                       break;
-               }
+                   (tmp & ATC_VMID0_PASID_MAPPING__PASID_MASK) == pasid)
+                       mask |= 1 << vmid;
        }
 
+       WREG32(mmVM_INVALIDATE_REQUEST, mask);
+       RREG32(mmVM_INVALIDATE_RESPONSE);
+       up_read(&adev->reset_domain->sem);
        return 0;
 }