MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2 cpu_wait.

Without this, the

    WARN_ON_ONCE(irqs_disabled());

in the idle loop will be triggered.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 36e79f528e89b999b391e5571767660ad4c3d027..78cc7d6fc845ff9858cc1e9595de0428e718522c 100644 (file)
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -34,6 +34,7 @@ static void r3081_wait(void)
 {
        unsigned long cfg = read_c0_conf();
        write_c0_conf(cfg | R30XX_CONF_HALT);
+       local_irq_enable();
 }
 
 static void r39xx_wait(void)
@@ -109,6 +110,7 @@ static void au1k_wait(void)
        "       nop                             \n"
        "       .set    mips0                   \n"
        : : "r" (au1k_wait));
+       local_irq_enable();
 }
 
 static int __initdata nowait;

diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index 84889573b5669f22e1632108c5f32b94285d5814..868976d443a65769f6cf0ce7e4ebedc0666ca3bf 100644 (file)
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
@@ -200,6 +200,7 @@ static void loongson2_cpu_wait(void)
        LOONGSON_CHIPCFG0 &= ~0x7;      /* Put CPU into wait mode */
        LOONGSON_CHIPCFG0 = cpu_freq;   /* Restore CPU state */
        spin_unlock_irqrestore(&loongson2_wait_lock, flags);
+       local_irq_enable();
 }
 
 static int __init cpufreq_init(void)