drm/amd/powerplay: drop the unnecessary uclk hard min setting

Since soft min setting is enough. Hard min setting is redundant.

Reported-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index 205fac8d2bc8790d8417d3eddcdf0651100b27eb..5824213d5b504574bacbf33c7178d3a6bbdde473 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -1690,13 +1690,6 @@ static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr)
                                        (PPCLK_UCLK << 16) | (min_freq & 0xffff))),
                                        "Failed to set soft min memclk !",
                                        return ret);
-
-               min_freq = data->dpm_table.mem_table.dpm_state.hard_min_level;
-               PP_ASSERT_WITH_CODE(!(ret = smum_send_msg_to_smc_with_parameter(
-                                       hwmgr, PPSMC_MSG_SetHardMinByFreq,
-                                       (PPCLK_UCLK << 16) | (min_freq & 0xffff))),
-                                       "Failed to set hard min memclk !",
-                                       return ret);
        }
 
        if (data->smu_features[GNLD_DPM_UVD].enabled) {