int c400_blk_cnt; \
        int c400_host_buf; \
        int io_width; \
-       int pdma_residual
+       int pdma_residual; \
+       int board
 
 #define NCR5380_dma_xfer_len            generic_NCR5380_dma_xfer_len
 #define NCR5380_dma_recv_setup          generic_NCR5380_precv
        }
        hostdata = shost_priv(instance);
 
+       hostdata->board = board;
        hostdata->io = iomem;
        hostdata->region_size = region_size;
 
        int count = 10000;
 
        do {
+               if (hostdata->board == BOARD_DTC3181E)
+                       udelay(4); /* DTC436 chip hangs without this */
                if (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)
                        return;
        } while (--count > 0);
 
        /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
        if (transfersize % 128)
-               transfersize = 0;
+               return 0;
+
+       /* Limit PDMA send to 512 B to avoid random corruption on DTC3181E */
+       if (hostdata->board == BOARD_DTC3181E &&
+           cmd->sc_data_direction == DMA_TO_DEVICE)
+               transfersize = min(cmd->SCp.this_residual, 512);
 
        return min(transfersize, DMA_MAX_SIZE);
 }