bpf, tests: Add more ALU64 BPF_MUL tests

This patch adds BPF_MUL tests for 64x32 and 64x64 multiply. Mainly
testing 32-bit JITs that implement ALU64 operations with two 32-bit
CPU registers per operand.

Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20210809091829.810076-8-johan.almbladh@anyfinetworks.com

diff --git a/lib/test_bpf.c b/lib/test_bpf.c
index b95bed03ab1b3b405fa595a54a58edd9712868c9..072f9c51bd9bc1d57393a1bf62b26c99be4fdd84 100644 (file)
--- a/lib/test_bpf.c
+++ b/lib/test_bpf.c
@@ -3051,6 +3051,31 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 2147483647 } },
        },
+       {
+               "ALU64_MUL_X: 64x64 multiply, low word",
+               .u.insns_int = {
+                       BPF_LD_IMM64(R0, 0x0fedcba987654321LL),
+                       BPF_LD_IMM64(R1, 0x123456789abcdef0LL),
+                       BPF_ALU64_REG(BPF_MUL, R0, R1),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0xe5618cf0 } }
+       },
+       {
+               "ALU64_MUL_X: 64x64 multiply, high word",
+               .u.insns_int = {
+                       BPF_LD_IMM64(R0, 0x0fedcba987654321LL),
+                       BPF_LD_IMM64(R1, 0x123456789abcdef0LL),
+                       BPF_ALU64_REG(BPF_MUL, R0, R1),
+                       BPF_ALU64_IMM(BPF_RSH, R0, 32),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0x2236d88f } }
+       },
        /* BPF_ALU | BPF_MUL | BPF_K */
        {
                "ALU_MUL_K: 2 * 3 = 6",
@@ -3161,6 +3186,29 @@ static struct bpf_test tests[] = {
                { },
                { { 0, 0x1 } },
        },
+       {
+               "ALU64_MUL_K: 64x32 multiply, low word",
+               .u.insns_int = {
+                       BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
+                       BPF_ALU64_IMM(BPF_MUL, R0, 0x12345678),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0xe242d208 } }
+       },
+       {
+               "ALU64_MUL_K: 64x32 multiply, high word",
+               .u.insns_int = {
+                       BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
+                       BPF_ALU64_IMM(BPF_MUL, R0, 0x12345678),
+                       BPF_ALU64_IMM(BPF_RSH, R0, 32),
+                       BPF_EXIT_INSN(),
+               },
+               INTERNAL,
+               { },
+               { { 0, 0xc28f5c28 } }
+       },
        /* BPF_ALU | BPF_DIV | BPF_X */
        {
                "ALU_DIV_X: 6 / 2 = 3",