drm/amdgpu: Revert programming GRBM_GFX_* in RLCG interface to support GFX9

[Why]
Regression of commit 72fef4980ddf ("drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOV") on GFX9.
According to GFX9 VF using different method to access GC registers including MMIO(direct) and RLCG(indirect),
removing GRBM_GFX_* writing would make PIPE/ME/VM/QUEUE selection chaos leading to some OCL benchmark failure.

For example,
using RLCG interface to program GRBM_GFX_CNTL/INDEX for selecting MEC(actually the value is only in scratch2/3),
then using MMIO directly program a MEC register in VF driver.
The register programming are invalid due to GC switched to incorrect ME.

[How]
With checking RLCG accessing flag, keep writing GRBM_GFX_* as a legacy way.
But it is still skipped on GFX10+ to avoid violation occurrence.

Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index ca5a1d026f5a959520d56faf3d9b306c3aeaa26b..f2e2cbaa7fde07b85f7691d0b31a45faa501b93e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -983,9 +983,13 @@ static u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v
        if (offset == reg_access_ctrl->grbm_cntl) {
                /* if the target reg offset is grbm_cntl, write to scratch_reg2 */
                writel(v, scratch_reg2);
+               if (flag == AMDGPU_RLCG_GC_WRITE_LEGACY)
+                       writel(v, ((void __iomem *)adev->rmmio) + (offset * 4));
        } else if (offset == reg_access_ctrl->grbm_idx) {
                /* if the target reg offset is grbm_idx, write to scratch_reg3 */
                writel(v, scratch_reg3);
+               if (flag == AMDGPU_RLCG_GC_WRITE_LEGACY)
+                       writel(v, ((void __iomem *)adev->rmmio) + (offset * 4));
        } else {
                /*
                 * SCRATCH_REG0         = read/write value