Under onevf mode the smu support to other chips is not well
verified yet.
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
        if (adev->asic_type == CHIP_VEGA20)
                return (amdgpu_dpm == 2) ? true : false;
        else if (adev->asic_type >= CHIP_ARCTURUS) {
-               if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))
+               if (amdgpu_sriov_vf(adev) &&
+                   !(adev->asic_type == CHIP_ARCTURUS &&
+                     amdgpu_sriov_is_pp_one_vf(adev)))
+
                        return false;
                else
                        return true;