cpuclk = kzalloc(ncpus * sizeof(*cpuclk), GFP_KERNEL);
        if (WARN_ON(!cpuclk))
-               return;
+               goto cpuclk_out;
 
        clks = kzalloc(ncpus * sizeof(*clks), GFP_KERNEL);
        if (WARN_ON(!clks))
                kfree(cpuclk[ncpus].clk_name);
 clks_out:
        kfree(cpuclk);
+cpuclk_out:
+       iounmap(clock_complex_base);
 }
 
 CLK_OF_DECLARE(armada_xp_cpu_clock, "marvell,armada-xp-cpu-clock",
 
        clk_data.clk_num = 2 + desc->num_ratios;
        clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *),
                                GFP_KERNEL);
-       if (WARN_ON(!clk_data.clks))
+       if (WARN_ON(!clk_data.clks)) {
+               iounmap(base);
                return;
+       }
 
        /* Register TCLK */
        of_property_read_string_index(np, "clock-output-names", 0,
 
        ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
        if (WARN_ON(!ctrl))
-               return;
+               goto ctrl_out;
 
        spin_lock_init(&ctrl->lock);
 
        ctrl->num_gates = n;
        ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk *),
                              GFP_KERNEL);
-       if (WARN_ON(!ctrl->gates)) {
-               kfree(ctrl);
-               return;
-       }
+       if (WARN_ON(!ctrl->gates))
+               goto gates_out;
 
        for (n = 0; n < ctrl->num_gates; n++) {
                const char *parent =
        }
 
        of_clk_add_provider(np, clk_gating_get_src, ctrl);
+
+       return;
+gates_out:
+       kfree(ctrl);
+ctrl_out:
+       iounmap(base);
 }