*/
        for (i = 0; i < GEN7_L3LOG_SIZE / 4; i++) {
                intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-               intel_ring_emit(ring, GEN7_L3LOG(slice, i));
+               intel_ring_emit_reg(ring, GEN7_L3LOG(slice, i));
                intel_ring_emit(ring, remap_info[i]);
        }
 
 
                                if (signaller == ring)
                                        continue;
 
-                               intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));
+                               intel_ring_emit_reg(ring, RING_PSMI_CTL(signaller->mmio_base));
                                intel_ring_emit(ring, _MASKED_BIT_ENABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));
                        }
                }
                                if (signaller == ring)
                                        continue;
 
-                               intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));
+                               intel_ring_emit_reg(ring, RING_PSMI_CTL(signaller->mmio_base));
                                intel_ring_emit(ring, _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));
                        }
                }
 
 
        for (i = 0; i < 4; i++) {
                intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-               intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
+               intel_ring_emit_reg(ring, GEN7_SO_WRITE_OFFSET(i));
                intel_ring_emit(ring, 0);
        }
 
 
                intel_ring_emit(ring, MI_NOOP);
                intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-               intel_ring_emit(ring, INSTPM);
+               intel_ring_emit_reg(ring, INSTPM);
                intel_ring_emit(ring, instp_mask << 16 | instp_mode);
                intel_ring_advance(ring);
 
 
                return ret;
 
        intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-       intel_ring_emit(ring, GEN8_RING_PDP_UDW(ring, entry));
+       intel_ring_emit_reg(ring, GEN8_RING_PDP_UDW(ring, entry));
        intel_ring_emit(ring, upper_32_bits(addr));
        intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-       intel_ring_emit(ring, GEN8_RING_PDP_LDW(ring, entry));
+       intel_ring_emit_reg(ring, GEN8_RING_PDP_LDW(ring, entry));
        intel_ring_emit(ring, lower_32_bits(addr));
        intel_ring_advance(ring);
 
                return ret;
 
        intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2));
-       intel_ring_emit(ring, RING_PP_DIR_DCLV(ring));
+       intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(ring));
        intel_ring_emit(ring, PP_DIR_DCLV_2G);
-       intel_ring_emit(ring, RING_PP_DIR_BASE(ring));
+       intel_ring_emit_reg(ring, RING_PP_DIR_BASE(ring));
        intel_ring_emit(ring, get_pd_offset(ppgtt));
        intel_ring_emit(ring, MI_NOOP);
        intel_ring_advance(ring);
                return ret;
 
        intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2));
-       intel_ring_emit(ring, RING_PP_DIR_DCLV(ring));
+       intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(ring));
        intel_ring_emit(ring, PP_DIR_DCLV_2G);
-       intel_ring_emit(ring, RING_PP_DIR_BASE(ring));
+       intel_ring_emit_reg(ring, RING_PP_DIR_BASE(ring));
        intel_ring_emit(ring, get_pd_offset(ppgtt));
        intel_ring_emit(ring, MI_NOOP);
        intel_ring_advance(ring);
 
         */
        if (ring->id == RCS) {
                intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-               intel_ring_emit(ring, DERRMR);
+               intel_ring_emit_reg(ring, DERRMR);
                intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |
                                        DERRMR_PIPEB_PRI_FLIP_DONE |
                                        DERRMR_PIPEC_PRI_FLIP_DONE));
                else
                        intel_ring_emit(ring, MI_STORE_REGISTER_MEM |
                                              MI_SRM_LRM_GLOBAL_GTT);
-               intel_ring_emit(ring, DERRMR);
+               intel_ring_emit_reg(ring, DERRMR);
                intel_ring_emit(ring, ring->scratch.gtt_offset + 256);
                if (IS_GEN8(dev)) {
                        intel_ring_emit(ring, 0);
 
 
                intel_logical_ring_emit(ringbuf, MI_NOOP);
                intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(1));
-               intel_logical_ring_emit(ringbuf, INSTPM);
+               intel_logical_ring_emit_reg(ringbuf, INSTPM);
                intel_logical_ring_emit(ringbuf, instp_mask << 16 | instp_mode);
                intel_logical_ring_advance(ringbuf);
 
 
        intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(w->count));
        for (i = 0; i < w->count; i++) {
-               intel_logical_ring_emit(ringbuf, w->reg[i].addr);
+               intel_logical_ring_emit_reg(ringbuf, w->reg[i].addr);
                intel_logical_ring_emit(ringbuf, w->reg[i].value);
        }
        intel_logical_ring_emit(ringbuf, MI_NOOP);
        for (i = GEN8_LEGACY_PDPES - 1; i >= 0; i--) {
                const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);
 
-               intel_logical_ring_emit(ringbuf, GEN8_RING_PDP_UDW(ring, i));
+               intel_logical_ring_emit_reg(ringbuf, GEN8_RING_PDP_UDW(ring, i));
                intel_logical_ring_emit(ringbuf, upper_32_bits(pd_daddr));
-               intel_logical_ring_emit(ringbuf, GEN8_RING_PDP_LDW(ring, i));
+               intel_logical_ring_emit_reg(ringbuf, GEN8_RING_PDP_LDW(ring, i));
                intel_logical_ring_emit(ringbuf, lower_32_bits(pd_daddr));
        }
 
 
        iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
        ringbuf->tail += 4;
 }
+static inline void intel_logical_ring_emit_reg(struct intel_ringbuffer *ringbuf,
+                                              u32 reg)
+{
+       intel_logical_ring_emit(ringbuf, reg);
+}
 
 /* Logical Ring Contexts */
 
 
                                MI_LOAD_REGISTER_IMM(GEN9_NUM_MOCS_ENTRIES));
 
        for (index = 0; index < table->size; index++) {
-               intel_logical_ring_emit(ringbuf, mocs_register(ring, index));
+               intel_logical_ring_emit_reg(ringbuf, mocs_register(ring, index));
                intel_logical_ring_emit(ringbuf,
                                        table->table[index].control_value);
        }
         * that value to all the used entries.
         */
        for (; index < GEN9_NUM_MOCS_ENTRIES; index++) {
-               intel_logical_ring_emit(ringbuf, mocs_register(ring, index));
+               intel_logical_ring_emit_reg(ringbuf, mocs_register(ring, index));
                intel_logical_ring_emit(ringbuf, table->table[0].control_value);
        }
 
                value = (table->table[count].l3cc_value & 0xffff) |
                        ((table->table[count + 1].l3cc_value & 0xffff) << 16);
 
-               intel_logical_ring_emit(ringbuf, GEN9_LNCFCMOCS(i));
+               intel_logical_ring_emit_reg(ringbuf, GEN9_LNCFCMOCS(i));
                intel_logical_ring_emit(ringbuf, value);
        }
 
         * they are reserved by the hardware.
         */
        for (; i < GEN9_NUM_MOCS_ENTRIES / 2; i++) {
-               intel_logical_ring_emit(ringbuf, GEN9_LNCFCMOCS(i));
+               intel_logical_ring_emit_reg(ringbuf, GEN9_LNCFCMOCS(i));
                intel_logical_ring_emit(ringbuf, value);
 
                value = filler;
 
 
        intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(w->count));
        for (i = 0; i < w->count; i++) {
-               intel_ring_emit(ring, w->reg[i].addr);
+               intel_ring_emit_reg(ring, w->reg[i].addr);
                intel_ring_emit(ring, w->reg[i].value);
        }
        intel_ring_emit(ring, MI_NOOP);
                if (mbox_reg != GEN6_NOSYNC) {
                        u32 seqno = i915_gem_request_get_seqno(signaller_req);
                        intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
-                       intel_ring_emit(signaller, mbox_reg);
+                       intel_ring_emit_reg(signaller, mbox_reg);
                        intel_ring_emit(signaller, seqno);
                }
        }
 
        iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
        ringbuf->tail += 4;
 }
+static inline void intel_ring_emit_reg(struct intel_engine_cs *ring,
+                                      u32 reg)
+{
+       intel_ring_emit(ring, reg);
+}
 static inline void intel_ring_advance(struct intel_engine_cs *ring)
 {
        struct intel_ringbuffer *ringbuf = ring->buffer;