unsigned int spi_freq;
        int ret = -EINVAL;
 
+       switch (ch->src) {
+       case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL:
+               spi_freq = adc->dfsdm->spi_master_freq;
+               break;
+       case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING:
+       case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING:
+               spi_freq = adc->dfsdm->spi_master_freq / 2;
+               break;
+       default:
+               spi_freq = adc->spi_freq;
+       }
+
        switch (mask) {
        case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
                ret = iio_device_claim_direct_mode(indio_dev);
                if (ret)
                        return ret;
+
                ret = stm32_dfsdm_compute_all_osrs(indio_dev, val);
-               if (!ret)
+               if (!ret) {
+                       dev_dbg(&indio_dev->dev,
+                               "Sampling rate changed from (%u) to (%u)\n",
+                               adc->sample_freq, spi_freq / val);
                        adc->oversamp = val;
+                       adc->sample_freq = spi_freq / val;
+               }
                iio_device_release_direct_mode(indio_dev);
                return ret;
 
                if (ret)
                        return ret;
 
-               switch (ch->src) {
-               case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL:
-                       spi_freq = adc->dfsdm->spi_master_freq;
-                       break;
-               case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING:
-               case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING:
-                       spi_freq = adc->dfsdm->spi_master_freq / 2;
-                       break;
-               default:
-                       spi_freq = adc->spi_freq;
-               }
-
                ret = dfsdm_adc_set_samp_freq(indio_dev, val, spi_freq);
                iio_device_release_direct_mode(indio_dev);
                return ret;