}
 
 /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
-static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
-                             int source, unsigned int fref, unsigned int fout)
+static int da7213_set_component_pll(struct snd_soc_component *component,
+                                   int pll_id, int source,
+                                   unsigned int fref, unsigned int fout)
 {
-       struct snd_soc_component *component = codec_dai->component;
        struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
 
        u8 pll_ctrl, indiv_bits, indiv;
 static const struct snd_soc_dai_ops da7213_dai_ops = {
        .hw_params      = da7213_hw_params,
        .set_fmt        = da7213_set_dai_fmt,
-       .set_pll        = da7213_set_dai_pll,
        .digital_mute   = da7213_mute,
 };
 
        .dapm_routes            = da7213_audio_map,
        .num_dapm_routes        = ARRAY_SIZE(da7213_audio_map),
        .set_sysclk             = da7213_set_component_sysclk,
+       .set_pll                = da7213_set_component_pll,
        .idle_bias_on           = 1,
        .use_pmdown_time        = 1,
        .endianness             = 1,