Documentation/x86: Switch to new Intel CPU model defines

New CPU #defines encode vendor and family as well as model
so "_FAM6" is no longer used in the #define names.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/20240611204814.353821-1-tony.luck@intel.com

diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst
index 8895784d478418744006c163d192d7b0b5b5bdb2..6ef426a52cdc97acbb600652d0037bf64bf4f086 100644 (file)
--- a/Documentation/arch/x86/cpuinfo.rst
+++ b/Documentation/arch/x86/cpuinfo.rst
@@ -112,7 +112,7 @@ conditions are met, the features are enabled by the set_cpu_cap or
 setup_force_cpu_cap macros. For example, if bit 5 is set in MSR_IA32_CORE_CAPS,
 the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and
 "split_lock_detect" will be displayed. The flag "ring3mwait" will be
-displayed only when running on INTEL_FAM6_XEON_PHI_[KNL|KNM] processors.
+displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.
 
 d: Flags can represent purely software features.
 ------------------------------------------------