]> www.infradead.org Git - users/willy/pagecache.git/commitdiff
ixgbe: Correct BASE-BX10 compliance code
authorTore Amundsen <tore@amundsen.org>
Fri, 15 Nov 2024 14:17:36 +0000 (14:17 +0000)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 3 Dec 2024 18:11:53 +0000 (10:11 -0800)
SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).

The current value in the source code is 0x64, which appears to be a
mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.

Fixes: 1b43e0d20f2d ("ixgbe: Add 1000BASE-BX support")
Signed-off-by: Tore Amundsen <tore@amundsen.org>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Acked-by: Ernesto Castellotti <ernesto@castellotti.net>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h

index 14aa2ca51f70ec81f9e286c217681f5feb7b32af..81179c60af4e0199a8b9d0fcdf34654b02eedfac 100644 (file)
@@ -40,7 +40,7 @@
 #define IXGBE_SFF_1GBASESX_CAPABLE             0x1
 #define IXGBE_SFF_1GBASELX_CAPABLE             0x2
 #define IXGBE_SFF_1GBASET_CAPABLE              0x8
-#define IXGBE_SFF_BASEBX10_CAPABLE             0x64
+#define IXGBE_SFF_BASEBX10_CAPABLE             0x40
 #define IXGBE_SFF_10GBASESR_CAPABLE            0x10
 #define IXGBE_SFF_10GBASELR_CAPABLE            0x20
 #define IXGBE_SFF_SOFT_RS_SELECT_MASK          0x8